scholarly journals Block Utilization-Aware Buffer Replacement Scheme for Mobile NAND Flash Storage

2014 ◽  
Vol E97.D (9) ◽  
pp. 2510-2513 ◽  
Author(s):  
Dong Hyun KANG ◽  
Changwoo MIN ◽  
Young Ik EOM
2013 ◽  
Vol 367 ◽  
pp. 541-543
Author(s):  
Yun Peng Li

This article focuses on research and implementation of a kind of solid storage system that is based on NAND flash which can store the data with high speed and huge capacity. A design with quad 1.25Gsps ADC and flash storage array with 1TB is demonstrated in the paper. The design is applied widely in many fields such as radar, communication and speech recognition. The detail of hardware development is also introduced in the thesis. In addition, a method is discussed to approve the reading and writing bandwidth by parallel operations on multiple pieces of flash. By using the method, the data bandwidth is arrived 6GB/S.


2011 ◽  
Vol 219-220 ◽  
pp. 972-975 ◽  
Author(s):  
Zhi Jian Yin ◽  
Yun Fei He ◽  
Chun Ru Xiong ◽  
Run Yang Zhong

This paper utilizes ARM 9 series chips such as S3C2440 as the CPU to realize an embedded Linux system. Due to the integration of NAND Flash in S3C2440, it is easy to connect the NAND Flash external devices in the perspective of hardware. After that, the system combines the serial ports which intend to load and debug the driver of NAND Flash, realizing the loading and uninstalling of NAND Flash storage modules. The innovative design and realization is a basic for the implementation of YAFFS file system in the Linux terminals.


Sensors ◽  
2020 ◽  
Vol 20 (10) ◽  
pp. 2952 ◽  
Author(s):  
Seung-Ho Lim ◽  
Ki-Woong Park

NAND flash memory-based storage devices are vulnerable to errors induced by NAND flash memory cells. Error-correction codes (ECCs) are integrated into the flash memory controller to correct errors in flash memory. However, since ECCs show inherent limits in checking the excessive increase in errors, a complementary method should be considered for the reliability of flash storage devices. In this paper, we propose a scheme based on lossless data compression that enhances the error recovery ability of flash storage devices, which applies to improve recovery capability both of inside and outside the page. Within a page, ECC encoding is realized on compressed data by the adaptive ECC module, which results in a reduced code rate. From the perspective of outside the page, the compressed data are not placed at the beginning of the page, but rather is placed at a specific location within the page, which makes it possible to skip certain pages during the recovery phase. As a result, the proposed scheme improves the uncorrectable bit error rate (UBER) of the legacy system.


Author(s):  
Jie Guo ◽  
Wujie Wen ◽  
Jingtong Hu ◽  
Danghui Wang ◽  
Hai Li ◽  
...  

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