scholarly journals Creating And Testing Vlans Using Network Switches

2020 ◽  
Author(s):  
John Jantzi ◽  
Xiannong Meng ◽  
Maurice Aburdene
Keyword(s):  
Author(s):  
Zhiying Wang ◽  
Omer Shaked ◽  
Yuval Cassuto ◽  
Jehoshua Bruck
Keyword(s):  

2022 ◽  
Vol 15 (1) ◽  
pp. 1-31
Author(s):  
Philippos Papaphilippou ◽  
Jiuxi Meng ◽  
Nadeen Gebara ◽  
Wayne Luk

We present Hipernetch, a novel FPGA-based design for performing high-bandwidth network switching. FPGAs have recently become more popular in data centers due to their promising capabilities for a wide range of applications. With the recent surge in transceiver bandwidth, they could further benefit the implementation and refinement of network switches used in data centers. Hipernetch replaces the crossbar with a “combined parallel round-robin arbiter”. Unlike a crossbar, the combined parallel round-robin arbiter is easy to pipeline, and does not require centralised iterative scheduling algorithms that try to fit too many steps in a single or a few FPGA cycles. The result is a network switch implementation on FPGAs operating at a high frequency and with a low port-to-port latency. Our proposed Hipernetch architecture additionally provides a competitive switching performance approaching output-queued crossbar switches. Our implemented Hipernetch designs exhibit a throughput that exceeds 100 Gbps per port for switches of up to 16 ports, reaching an aggregate throughput of around 1.7 Tbps.


Author(s):  
Vincenzo Rana ◽  
Marco Domenico Santambrogio ◽  
Simone Corbetta

The aim of this chapter is the definition of the main issues that arise when dealing with the design of a NoC-based reconfigurable system. In particular, after the definition of the target architecture, several factors, requirements and constraints that have to be taken into account during the design of reconfigurable NoCs will be described and analyzed. The second part of this chapter will focus on the main issues in dynamic reconfigurable NoCs design, such as the definition of a layered approach, of a packet-switched communication infrastructure, of a proper routing mechanism and of a communication protocol support. Finally, the last part of this chapter will deal with the description of the most relevant implementation details, such as the placement of the bus-macros, the design of the network switches and the physical implementation of the routing mechanism.


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