GERARD: GEneral RApid Resolution of Digital Mazes Using a Memristor Emulator
Keyword(s):
In this paper, a system of searching for optimal paths is developed and concreted on a FPGA. It is based on a memristive emulator, used as a delay element, by configuring the test graph as a memristor network. A parallel algorithm is applied to reduce computing time and increase efficiency. The operation of the algorithm in Matlab is checked beforehand and then exported to two different Intel FPGAs: a DE0-Nano board and an Arria 10 GX 220 FPGA. In both cases reliable results are obtained quickly and conveniently, even for the case of a 300x300 nodes maze.
2018 ◽
Vol 2018
◽
pp. 1-10
◽
Keyword(s):
2017 ◽
Keyword(s):
2001 ◽
Vol 11
(01)
◽
pp. 125-138
◽
2011 ◽
Vol 08
(03)
◽
pp. 597-609
◽
1978 ◽
Vol 36
(1)
◽
pp. 282-283
Keyword(s):
1996 ◽
Vol 54
◽
pp. 490-491
2005 ◽
Vol 2
(1)
◽
pp. 47-49
◽
Keyword(s):