Development of Library Components for Floating Point Processor
2021 ◽
Vol 33
(4)
◽
pp. 42-50
Keyword(s):
This paper deals with development of an n-bit binary to decimal conversion, decimal to n bit binary conversion and decimal to IEEE-754 conversion for floating point arithmetic logic unit (FPALU) using VHDL. Normally most of the industries now a days are using either 4-bit conversion of ALU or 8-bit conversions of ALU, so we have generalized this, thus we need not to worry about the bit size of conversion of ALU. It has solved all the problems of 4-bit, 8-bit, 16-bit conversions of ALU’s and so on. Hence, we have utilized VHSIC Hardware Description Language and Xilinx in accomplishing this task of development of conversions processes of ALU
Keyword(s):
Keyword(s):
2020 ◽
Vol 378
(2166)
◽
pp. 20190066
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2000 ◽
Vol 8
(3)
◽
pp. 273-286
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