Floating-Point Computations with Very-High-Speed Integrated Circuit Hardware Description Language and Xilinx System Generator (SysGen) Tools

2018 ◽  
pp. 547-624
Author(s):  
A. Arockia Bazil Raj
Keyword(s):  
Integrated Circuit ◽  
High Speed ◽  
Hardware Description Language ◽  
Floating Point ◽  
Description Language ◽  
System Generator ◽  
Hardware Description ◽  
Xilinx System Generator ◽  
Very High

scholarly journals SYNTHESIS AND FPGA–IMPLEMENTATION BASED NEURAL TECHNIQUE OF A NONLINEAR ADC MODEL

2014 ◽  
pp. 27-33
Author(s):  
Mounir Bouhedda ◽  
Mokhtar Attari
Keyword(s):  
Integrated Circuit ◽  
Field Programmable Gate Array ◽  
High Speed ◽  
Hardware Description Language ◽  
Description Language ◽  
Analog To Digital ◽  
Field Programmable ◽  
Hardware Description ◽  
Nonlinear Analog ◽  
Very High

The aim of this paper is to introduce a new architecture using Artificial Neural Networks (ANN) in designing a 6-bit nonlinear Analog to Digital Converter (ADC). A study was conducted to synthesise an optimal ANN in view to FPGA (Field Programmable Gate Array) implementation using Very High-speed Integrated Circuit Hardware Description Language (VHDL). Simulation and tests results are carried out to show the efficiency of the designed ANN.

scholarly journals Support Vector Machine working on FPGA and the segmentation method of brain MR screening

2017 ◽  
Vol 4 (3) ◽  
pp. 120 ◽  
Author(s):  
Fatih Şişik ◽  
Eser Sert
Keyword(s):  
Integrated Circuit ◽  
Field Programmable Gate Array ◽  
High Speed ◽  
Hardware Description Language ◽  
Support Vector ◽  
Segmentation Method ◽  
Description Language ◽  
Field Programmable ◽  
Hardware Description ◽  
Very High

Alan Programlanabilir Kapı Dizileri (Field Programmable Gate Array-FPGA) programlanabilir sayısal bloklar ve bağlantılarını içeren cihazlar olup çok esnek ve hızlı çalışabilme özelliklerine sahiptir. Programlanabilen bu sayısal kapılar sayesinde karmaşık tasarımlar kolay bir şekilde geliştirilebilmektedir. FPGA’lar küçük boyutlarda olup bilgisayardan bağımsız mobil olarak ve bilgisayarlardan daha yüksek hızlarda çalışabilmektedirler. Veri madenciliğinin görevlerinden biri olan sınıflandırma probleminin çözümü için geliştirilmiş önemli makine öğrenimi algoritmalarından biri Destek Vektör Makineleri’ dir. Literatürde Destek Vektör Makineleri’ nin diğer birçok tekniğe göre daha başarılı sonuçlar verdiği kanıtlanmıştır. Tümör analizi, yüz tanıma, robotik göz oluşturma gibi konular, araştırmacıların görüntü işleme alanında yoğun olarak üzerinde çalıştıkları güncel, önemli ve zor problemlerden bazılarıdır. Bilgisayarda yapılan tümör analizinde, grafik ve resimlerin işlenmesinde yavaş işlem yapma ve aynı zamanda mobil olmama sorunlarından, FPGA donanımı ile görüntü işlemede bu sorunların üstesinden gelinmektedir. Bu çalışmada FPGA donanımında çalışan destek vektör makinası kullanılarak daha gerçekçi tümör analizi yapılarak tümörlü bölgelerin bulunması ve gerekli analiz sonuçlarının gösterilmesi amaçlanmaktadır. Böylece sağlık alanında da kullanılabilecek yararlı bir donanımın tasarımı gerçekleştirilecektir. Dolayısıyla gömülü sistemlerle anlatılan bu işlem süreçlerini gerçekleştiren çalışma sayısı çok az olduğundan çalışma özgün değer taşımaktadır. Buna ek olarak, FPGA’ ya özgü donanım tanımlama dillerinden biri olan Çok Yüksek Hızlı Tümleşik Devre Tanımlama Dili (Very High Speed Integrated Circuit  Hardware Description Language- VHDL) kullanılacaktır. Bölütleme sonucunun değerlendirilmesi için Uniformity Measure (UM) kullanılmıştır. UM değerlendirme sonucunun başarılı olduğu görülmüştür. Anahtar Kelimeler: Alan Programlanabilir Kapı Dizileri, FPGA, çok yüksek hızlı tümleşik devre tanımlama dili, vhdl, segmentasyon, destek vektör makinesi

scholarly journals Aes Modes of Operation

2019 ◽  
Vol 8 (9) ◽  
pp. 2213-2217
Keyword(s):  
Integrated Circuit ◽  
High Speed ◽  
Hardware Description Language ◽  
Shopping Malls ◽  
Description Language ◽  
Huge Amount ◽  
Confidential Data ◽  
Hardware Description ◽  
Money Transfers ◽  
Very High

Cryptography is the science of secret codes. Previously we used DES algorithms in order to secure but cannot encrypt completely. Thus, we referred AES Algorithms to create a ciphertext in encryption and is given as an input in decryption. In present scenario, everyone sharing their data in online using internet alsoonline transactions like e-banking for money transfers, in shopping malls, restaurants, and many more. While transferring a huge amount or any confidential data there are many chances to hack the data.There are different modes of operations used in AES in accordance with the efficiency to blur the data. The design has been done in VHDL (Very High-Speed Integrated Circuit Hardware Description Language) and simulated and synthesized using Xilinx.

scholarly journals Performance evaluation and analysis of 64-quadrature amplitude modulator using Xilinx Spartan FPGA

2018 ◽  
Vol 7 (2.8) ◽  
pp. 570
Author(s):  
Joseph Anthony Prathap ◽  
T S.Anandhi ◽  
K Ramash Kumar ◽  
B Srikanth
Keyword(s):  
Integrated Circuit ◽  
High Speed ◽  
Hardware Description Language ◽  
Description Language ◽  
Set Top Box ◽  
Field Programmable ◽  
Amplitude Modulator ◽  
Hardware Description ◽  
Cellular Technology ◽  
Very High

This paper proposes the design of 64-Quadrature Amplitude Modulation using the Very High Speed Integrated Circuit Hardware Description Language (VHDL) coding and XILINX SPARTAN Field Programmable Gate Array (FPGA) real-time implementation for validation. QAM is used in modern digital communication applications like set-top box, satellite TV, wireless and cellular technology etc. In this paper, 64-QAM is implemented and compared with three different XILINX SPARTAN FPGA devices say 3A DSP, 3E and 6E. The power, current and thermal parameters are performed and compared. The power consumed for the design of 64 QAM using the Xilinx SPARTAN 6E FPGA device is 0.014W and 15.9 C/W of Effective TJA for the XILINX SPARTAN 3A DSP FPGA. The device utilization of the 64-QAM design using the XILINX SPARTAN 3A DSP is low.

The Control of High Voltage Electrostatic Precipitator Based on EDA

2014 ◽  
Vol 910 ◽  
pp. 336-339
Author(s):  
Zi Sheng Zhang ◽  
Yi Wang ◽  
Chun Sheng Wang ◽  
Jin Cui ◽  
Zhi Qiang Liu
Keyword(s):  
Control System ◽  
High Voltage ◽  
Integrated Circuit ◽  
Design Automation ◽  
High Speed ◽  
Electrostatic Precipitator ◽  
Hardware Description Language ◽  
Description Language ◽  
Hardware Description ◽  
Very High

In order to achieve the automatic control of electrostatic precipitator (ESP) more efficiently and accurately, an ESP system combining hardware and software is designed. According to the requirement of the ESP system,the Electronic Design Automation (EDA) is introduced to the ESP control system and the system is divided into four modules.These sub-modules are designed and the simulation waveform of the system is ananalyzed,based on the Very-High-Speed Integrated Circuit Hardware Description Language (VHDL) programming language and Quartus software.The results show that the security, flexibility and reliabity of the system is improved by using EDA as the control ,which is a great value for generalization.

A Visual Dependency Analysis Method Based on VHDL

2015 ◽  
Vol 738-739 ◽  
pp. 582-585
Author(s):  
Zhao Xiang Yi ◽  
Xiong Mei Zhang ◽  
Ning Li ◽  
Xiao Dong Mu
Keyword(s):  
Integrated Circuit ◽  
High Speed ◽  
Hardware Description Language ◽  
Data Dependency ◽  
Analysis Method ◽  
Description Language ◽  
Dependency Analysis ◽  
Hardware Description ◽  
Complex Circuits ◽  
Very High

Modern complex circuits are described in very high speed integrated circuit hardware description language (VHDL) and difficult to verify. This paper proposes a systematic and visual dependency analysis method based on VHDL. The dependency relationships including control dependency, data dependency, signal control dependency and signal data dependency are defined. The entity dependency graph is presented and its generation algorithm, which searches the dependency relationships in hardware processes and between hardware processes, are developed. The experiment of a typical keyboard demonstrates that it is a visual and efficient method to analyze dependency relationships of VHDL for formal verification.

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