СБИС ЦИФРОВОГО ПРОЦЕССОРА ДЛЯ ФОРМИРОВАНИЯ И ОБРАБОТКИ ШУМОПОДОБНЫХ СИГНАЛОВ В СИСТЕМАХ СВЯЗИ НА БАЗЕ ЯДРА NMC3

2020 ◽  
Vol 96 (3s) ◽  
pp. 21-27
Author(s):  
Д.Е. Косоруков ◽  
В.Ю. Залетов ◽  
В.В. Севрюков ◽  
В.В. Гордеев ◽  
А.А. Комлев
Keyword(s):  
Communication Systems ◽  
System On Chip ◽  
Streaming Data ◽  
Processor Core ◽  
On Chip ◽  
Digital Processor ◽  
Vector Matrix

В статье представлены результаты разработки СБИС цифрового процессора для формирования и обработки шумоподобных сигналов, используемого в системах связи класса «система на кристалле» на базе процессорного ядра NeuroMatrix® NMC3, ориентированного на векторно-матричную обработку потока данных произвольной разрядности. The paper describes the results of the development of a digital processor for generating and processing noise-like signals used in communication systems. The developed system-on-chip class processor is based on the NeuroMatrix® NMC3 processor core. NMC3 processor core has vector matrix architecture that is oriented to streaming data of variable bit width.

Microsense

2016 ◽  
Vol 7 (3) ◽  
pp. 38-55
Author(s):  
Srinivasa K.G. ◽  
Ganesh Hegde ◽  
Kushagra Mishra ◽  
Mohammad Nabeel Siddiqui ◽  
Abhishek Kumar ◽  
...  
Keyword(s):  
Real Time ◽  
Nodal Point ◽  
System On Chip ◽  
Streaming Data ◽  
Portable Devices ◽  
Time Data ◽  
Unified Framework ◽  
Real Time Data ◽  
Varied Degree ◽  
On Chip

With the advancement of portable devices and sensors, there has been a need to build a universal framework, which can serve as a nodal point to aggregate data from different kinds of devices and sensors. We propose a unified framework that will provide a robust set of guidelines for sensors with varied degree of complexities connected to common set of System-on-Chip (SoC). These will help to monitor, control and visualize real time data coming from different type of sensors connected to these SoCs. We have defined a set of APIs, which will help the sensors to register with the server. These APIs will be the standard to which the sensors will comply while streaming data when connected to the client platforms.

Microsense

2020 ◽  
pp. 170-189
Author(s):  
Srinivasa K.G. ◽  
Ganesh Hegde ◽  
Kushagra Mishra ◽  
Mohammad Nabeel Siddiqui ◽  
Abhishek Kumar ◽  
...  
Keyword(s):  
Real Time ◽  
Nodal Point ◽  
Aggregate Data ◽  
System On Chip ◽  
Streaming Data ◽  
Portable Devices ◽  
Time Data ◽  
Unified Framework ◽  
Real Time Data ◽  
On Chip

With the advancement of portable devices and sensors, there has been a need to build a universal framework, which can serve as a nodal point to aggregate data from different kinds of devices and sensors. We propose a unified framework that will provide a robust set of guidelines for sensors with varied degree of complexities connected to common set of System-on-Chip (SoC). These will help to monitor, control and visualize real time data coming from different type of sensors connected to these SoCs. We have defined a set of APIs, which will help the sensors to register with the server. These APIs will be the standard to which the sensors will comply while streaming data when connected to the client platforms.

A Reconfigurable Computing Processor Core for Multimedia System-on-Chip Applications

2006 ◽  
Vol 45 (4B) ◽  
pp. 3336-3342 ◽  
Author(s):  
Yeong-Kang Lai ◽  
Lien-Fei Chen ◽  
Jian-Chou Chen
Keyword(s):  
Reconfigurable Computing ◽  
System On Chip ◽  
Multimedia System ◽  
Processor Core ◽  
On Chip

Scalable Motion Estimation Processor Core for Multimedia System-on-Chip Applications

2007 ◽  
Vol 46 (4B) ◽  
pp. 2238-2243 ◽  
Author(s):  
Yeong-Kang Lai ◽  
Tian-En Hsieh ◽  
Lien-Fei Chen
Keyword(s):  
Motion Estimation ◽  
System On Chip ◽  
Multimedia System ◽  
Processor Core ◽  
On Chip

Multiprocessor transport surveillance video system based on "system on chip" technology

2020 ◽  
Author(s):  
Ш.С. Фахми ◽  
Н.В. Шаталова ◽  
В.В. Вислогузов ◽  
Е.В. Костикова
Keyword(s):  
System On Chip ◽  
Reference Points ◽  
Surveillance Video ◽  
Video Information ◽  
Chip Technology ◽  
Intelligent Video Surveillance System ◽  
Speed Up ◽  
Algorithmic Analysis ◽  
Computational Procedures ◽  
On Chip

В данной работе предлагаются математический аппарат и архитектура многопроцессорной транспортной системы на кристалле (МПТСнК). Выполнена программно-аппаратная реализация интеллектуальной системы видеонаблюдения на базе технологии «система на кристалле» и с использованием аппаратного ускорителя известного метода формирования опорных векторов. Архитектура включает в себя сложно-функциональные блоки анализа видеоинформации на базе параллельных алгоритмов нахождения опорных точек изображений и множества элементарных процессоров для выполнения сложных вычислительных процедур алгоритмов анализа с использованием средств проектирования на базе реконфигурируемой системы на кристалле, позволяющей оценить количество аппаратных ресурсов. Предлагаемая архитектура МПТСнК позволяет ускорить обработку и анализ видеоинформации при решении задач обнаружения и распознавания чрезвычайных ситуаций и подозрительных поведений. In this paper, we propose the mathematical apparatus and architecture of a multiprocessor transport system on a chip (MPTSoC). Software and hardware implementation of an intelligent video surveillance system based on the "system on chip" technology and using a hardware accelerator of the well-known method of forming reference vectors. The architecture includes complex functional blocks for analyzing video information based on parallel algorithms for finding image reference points and a set of elementary processors for performing complex computational procedures for algorithmic analysis. using design tools based on a reconfigurable system on chip that allows you to estimate the amount of hardware resources. The proposed MPTSoC architecture makes it possible to speed up the processing and analysis of video information when solving problems of detecting and recognizing emergencies and suspicious behaviors

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