scholarly journals Execution time - area tradeoff in gausing residual load decoder: Integrated exploration of chaining based schedule and allocation in HLS for hardware accelerators

2014 ◽  
Vol 27 (2) ◽  
pp. 235-249 ◽  
Author(s):  
Anirban Sengupta ◽  
Reza Sedaghat ◽  
Vipul Mishra
Keyword(s):  
Execution Time ◽  
Design Space Exploration ◽  
Design Space ◽  
Space Exploration ◽  
Integrated Design ◽  
Hardware Accelerators ◽  
Average Improvement ◽  
Genetic Algorithm Approach ◽  
High Level ◽  
The Cost

Design space exploration is an indispensable segment of High Level Synthesis (HLS) design of hardware accelerators. This paper presents a novel technique for Area-Execution time tradeoff using residual load decoding heuristics in genetic algorithms (GA) for integrated design space exploration (DSE) of scheduling and allocation. This approach is also able to resolve issues encountered during DSE of data paths for hardware accelerators, such as accuracy of the solution found, as well as the total exploration time during the process. The integrated solution found by the proposed approach satisfies the user specified constraints of hardware area and total execution time (not just latency), while at the same time offers a twofold unified solution of chaining based schedule and allocation. The cost function proposed in the genetic algorithm approach takes into account the functional units, multiplexers and demultiplexers needed during implementation. The proposed exploration system (ExpSys) was tested on a large number of benchmarks drawn from the literature for assessment of its efficiency. Results indicate an average improvement in Quality of Results (QoR) greater than 26% when compared to a recent well known GA based exploration method.

scholarly journals Implementation of integrated design space exploration of scheduling, allocation and binding in high level synthesis using multi structure genetic algorithm

2021 ◽  
Author(s):  
Michael Gebremariam
Keyword(s):  
Genetic Algorithm ◽  
Design Space Exploration ◽  
Design Space ◽  
Space Exploration ◽  
Integrated Design ◽  
High Level Synthesis ◽  
C Language ◽  
Low Level ◽  
Wide Range ◽  
High Level

The objective of this project is to develop a software tool which assists in comparison of a work known as "M-GenESys: Multi Structure Genetic Algorithm based Design Space Exploration System for Integrated Scheduling, Allocation and Binding in High Level Synthesis" with another well established GA approach known as "A Generic Algorithm for the Design Space Exploration of Data paths During High-Level Synthesis". Two sets of software are developed based on both approaches using Microsoft Visual 2005 C# language. The C# language is an object-oriented language that is aimed at enabling programmers to quickly develop a wide range of applications on the Microsoft .NET platform. The goal of C# and the .NET platform is to shorten development time by freeing the developer from worrying about several low level plumbing issues such as memory equipment, type safety issues, building low level libraries, array bound checking, etc., thus allowing developers to actually spend their time and energy working on the application and business logic.

scholarly journals Implementation of integrated design space exploration of scheduling, allocation and binding in high level synthesis using multi structure genetic algorithm

2021 ◽  
Author(s):  
Michael Gebremariam
Keyword(s):  
Genetic Algorithm ◽  
Design Space Exploration ◽  
Design Space ◽  
Space Exploration ◽  
Integrated Design ◽  
High Level Synthesis ◽  
C Language ◽  
Low Level ◽  
Wide Range ◽  
High Level

The objective of this project is to develop a software tool which assists in comparison of a work known as "M-GenESys: Multi Structure Genetic Algorithm based Design Space Exploration System for Integrated Scheduling, Allocation and Binding in High Level Synthesis" with another well established GA approach known as "A Generic Algorithm for the Design Space Exploration of Data paths During High-Level Synthesis". Two sets of software are developed based on both approaches using Microsoft Visual 2005 C# language. The C# language is an object-oriented language that is aimed at enabling programmers to quickly develop a wide range of applications on the Microsoft .NET platform. The goal of C# and the .NET platform is to shorten development time by freeing the developer from worrying about several low level plumbing issues such as memory equipment, type safety issues, building low level libraries, array bound checking, etc., thus allowing developers to actually spend their time and energy working on the application and business logic.

Function Ordering Within Morphological Charts: An Experimental Study

2018 ◽  
Author(s):  
Anant Chawla ◽  
Joshua D. Summers
Keyword(s):  
Experimental Study ◽  
Design Space Exploration ◽  
Engineering Students ◽  
Design Space ◽  
Space Exploration ◽  
Integrated Design ◽  
Input Function ◽  
Output Function ◽  
Design Concepts ◽  
Morphological Chart

Morphological charts are widely recognized tools in engineering design applications and research. However, a literature gap exists in instructing the representation and exploration of morphological charts. In this paper, an experiment is conducted to understand how morphological charts are explored and what impact functional arrangement has on it. The experiment consisted of two problem statements, each with five different functional arrangements: 1) Most to Least Important Function, 2) Least to Most Important Function, 3) Input to Output Function, 4) Output to Input Function, and 5) Random. Sixty-seven junior mechanical engineering students were provided a prepopulated morphological chart and asked to generate integrated design concepts. The generated concepts were analyzed to determine how frequently a given means is selected, how much of the chart is explored, what is the sequence of exploration, and finally the influence of function ordering on them. Experimental results indicate a tendency to focus more on the initial columns of the chart irrespective of functional order. Moreover, the Most-to-Least-Important functional order results in higher chances and uniformity of design space exploration.

scholarly journals A rapid design space exploration approach for multi-objective optimization of DSP filter designs

2021 ◽  
Author(s):  
Aakriti Tarun Sharma
Keyword(s):  
Design Space Exploration ◽  
Design Space ◽  
Space Exploration ◽  
Systems Design ◽  
Design Solution ◽  
Multi Objective Optimization ◽  
Multi Objective ◽  
Time Period ◽  
And Performance ◽  
High Level

The process of converting a behavioral specification of an application to its equivalent system architecture is referred to as High Level-Synthesis (HLS). A crucial stage in embedded systems design involves finding the trade off between resource utilization and performance. An exhaustive search would yield the required results, but would take a huge amount of time to arrive at the solution even for smaller designs. This would result in a high time complexity. We employ the use of Design Space Exploration (DSE) in order to reduce the complexity of the design space and to reach the desired results in less time. In reality, there are multiple constraints defined by the user that need to be satisfied simultaneously. Thus, the nature of the task at hand is referred to as Multi-Objective Optimization. In this thesis, the design process of DSP benchmarks was analyzed based on user defined constraints such as power and execution time. The analyzed outcome was compared with the existing approaches in DSE and an optimal design solution was derived in a shorter time period.

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