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An efficient conflict-free memory-addressing unit for SIMD VLIW DSP
Mapping Intimacies
◽
10.23919/spects.2017.8046778
◽
2017
◽
Author(s):
Hong Ye
◽
Naijie Gu
◽
Xiaoci Zhang
◽
Chuanwen Lin
Keyword(s):
Vliw Dsp
Download Full-text
Related Documents
Cited By
References
Modulo scheduling for the TMS320C6x VLIW DSP architecture
ACM SIGPLAN Notices
◽
10.1145/315253.314427
◽
1999
◽
Vol 34
(7)
◽
pp. 28-34
◽
Cited By ~ 5
Author(s):
Eric Stotzer
◽
Ernst Leiss
Keyword(s):
Modulo Scheduling
◽
Dsp Architecture
◽
Vliw Dsp
Download Full-text
Real-Time Loop Scheduling with Leakage Energy Minimization for Embedded VLIW DSP Processors
13th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA 2007)
◽
10.1109/rtcsa.2007.60
◽
2007
◽
Cited By ~ 4
Author(s):
Meng Wang
◽
Zili Shao
◽
Chun Jason Xue
◽
Edwin H.-M. Sha
Keyword(s):
Real Time
◽
Energy Minimization
◽
Loop Scheduling
◽
Vliw Dsp
◽
Dsp Processors
◽
Time Loop
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Energy-Aware Compiler Optimization for VLIW-DSP Cores
Advances in Intelligent Systems and Applications - Volume 2 - Smart Innovation, Systems and Technologies
◽
10.1007/978-3-642-35473-1_77
◽
2013
◽
pp. 779-788
Author(s):
Yung-Cheng Ma
◽
Tse-An Liu
◽
Wen-Shih Chao
Keyword(s):
Compiler Optimization
◽
Energy Aware
◽
Vliw Dsp
Download Full-text
Implementation of a digital copier using TMS320C6414 VLIW DSP processor
2003 IEEE International Conference on Acoustics, Speech, and Signal Processing, 2003. Proceedings. (ICASSP '03).
◽
10.1109/icassp.2003.1202443
◽
2003
◽
Author(s):
Taeksang Hwang
◽
Wonyong Sung
Keyword(s):
Vliw Dsp
Download Full-text
2.6 A 16nm 3.5B+ Transistor >14TOPS 2-to-10W Multicore SoC Platform for Automotive and Embedded Applications with Integrated Safety MCU, 512b Vector VLIW DSP, Embedded Vision and Imaging Acceleration
2020 IEEE International Solid- State Circuits Conference - (ISSCC)
◽
10.1109/isscc19947.2020.9062915
◽
2020
◽
Author(s):
Rama Venkatasubramanian
◽
Don Steiss
◽
Greg Shurtz
◽
Tim Anderson
◽
Kai Chirca
◽
...
Keyword(s):
Embedded Vision
◽
Vliw Dsp
◽
Embedded Applications
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Low power design and dynamic power management system for VLIW DSP subsystem
2011 International Symposium on Intelligent Signal Processing and Communications Systems (ISPACS)
◽
10.1109/ispacs.2011.6146123
◽
2011
◽
Author(s):
Hsien-Ching Hsieh
◽
Shui-An Wen
◽
Che-Yu Liao
◽
Huang-Lun Lin
◽
Po-Han Huang
◽
...
Keyword(s):
Low Power
◽
Power Management
◽
Management System
◽
Low Power Design
◽
Dynamic Power Management
◽
Dynamic Power
◽
Power Management System
◽
Vliw Dsp
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Assembly code conversion through pattern mapping between two VLIW DSP processors: a case study
6th International Conference on Signal Processing, 2002.
◽
10.1109/icosp.2002.1181076
◽
2003
◽
Cited By ~ 1
Author(s):
B. Su
◽
J. Wang
◽
E.W. Hu
◽
J. Manzano
Keyword(s):
Assembly Code
◽
Vliw Dsp
◽
Dsp Processors
Download Full-text
Mapping of video decoder software on a VLIW DSP multiprocessor
10.1117/12.304662
◽
1998
◽
Author(s):
Achim Freimann
◽
Thomas Brune
◽
Peter Pirsch
Keyword(s):
Video Decoder
◽
Vliw Dsp
Download Full-text
Current consumption dynamics at instruction and program level for a VLIW DSP processor
International Symposium on System Synthesis (IEEE Cat. No.01EX526)
◽
10.1109/isss.2001.957927
◽
2002
◽
Cited By ~ 2
Author(s):
R. Muresan
◽
C.H. Gebotys
Keyword(s):
Current Consumption
◽
Vliw Dsp
◽
Consumption Dynamics
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ORC2DSP: compiler infrastructure supports for VLIW DSP processors
2005 IEEE VLSI-TSA International Symposium on VLSI Design, Automation and Test, 2005. (VLSI-TSA-DAT).
◽
10.1109/vdat.2005.1500062
◽
2005
◽
Author(s):
Cheng-Wei Chen
◽
Chung-Lin Tang
◽
Young-Chia Lin
◽
Jenq-Kuen Lee
Keyword(s):
Compiler Infrastructure
◽
Vliw Dsp
◽
Dsp Processors
Download Full-text
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