scholarly journals Low power high speed and high accuracy design methodologies for pipeline Analog-to-Digital converters

2008 ◽  
Author(s):  
Vipul Katyal
Keyword(s):  
Low Power ◽  
High Speed ◽  
High Accuracy ◽  
Analog To Digital Converters ◽  
Analog To Digital ◽  
Design Methodologies

scholarly journals A Low Power, High Speed 1.2 V Dynamic Comparator for Analog-to-Digital Converters

2020 ◽  
Vol 171 ◽  
pp. 1018-1026
Author(s):  
Sahil Jakhar ◽  
Vishal Singh Mandloi ◽  
Rupam Goswami ◽  
Kavindra Kandpal
Keyword(s):  
Low Power ◽  
High Speed ◽  
Analog To Digital Converters ◽  
Dynamic Comparator ◽  
Analog To Digital

scholarly journals 1.5mW,14.68V/µS-Low Power and High Speed Comparator Design for ADC Applications

2019 ◽  
Vol 8 (6S4) ◽  
pp. 1322-1326
Keyword(s):  
Power Consumption ◽  
Low Power ◽  
Power Dissipation ◽  
High Speed ◽  
Analog To Digital Converters ◽  
Slew Rate ◽  
Two Stage ◽  
Analog To Digital ◽  
Low Offset ◽  
Medical Equipments

Advanced medical equipments embedded with the sensors, analog to digital converters (ADC) and other equipment. Gain amplifier and the comparator are key blocks in ADCs improvement. Comparator is the key element in achieving a low offset and high slew ratein the ADCs, in addition power and speed optimizationdesigns are preferred. To achieve high speed and low power a modified architecture of a comparator is introduced. A 5V two stage comparator is designed to meet the specifications as, offset value <8.4mV, power dissipation <1.5mW and slew rate>14.68V/µS. Cadence Virtuoso tools and SCL 0.18 µm technology parameters are used for design. Designed comparator shows improved slew rate and power consumption in comparison with the existing comparators

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