scholarly journals Exponentially Adiabatic Switching in Quantum-Dot Cellular Automata

2018 ◽  
Vol 8 (3) ◽  
pp. 30 ◽  
Author(s):  
Subhash Pidaparthi ◽  
Craig Lent
Keyword(s):  
Energy Dissipation ◽  
Cellular Automata ◽  
Quantum Dot ◽  
Switching Time ◽  
Excess Energy ◽  
Quantum Dot Cellular Automata ◽  
Classical Systems ◽  
Switching Event ◽  
Adiabatic Switching ◽  
Exponential Decrease

We calculate the excess energy transferred into two-dot and three-dot quantum dot cellular automata systems during switching events. This is the energy that must eventually be dissipated as heat. The adiabaticity of a switching event is quantified using the adiabaticity parameter of Landau and Zener. For the logically reversible operations of WRITE or ERASE WITH COPY, the excess energy transferred to the system decreases exponentially with increasing adiabaticity. For the logically irreversible operation of ERASE WITHOUT COPY, considerable energy is transferred and so must be dissipated, in accordance with the Landauer Principle. The exponential decrease in energy dissipation with adiabaticity (e.g., switching time) distinguishes adiabatic quantum switching from the usual linear improvement in classical systems.

scholarly journals Designing single layer counter in quantum-dot cellular automata with energy dissipation analysis

2018 ◽  
Vol 9 (4) ◽  
pp. 2641-2648 ◽  
Author(s):  
Md. Abdullah-Al-Shafi ◽  
Ali Newaz Bahar ◽  
Md. Ahsan Habib ◽  
Mohammad Maksudur Rahman Bhuiyan ◽  
Firdous Ahmad ◽  
...  
Keyword(s):  
Energy Dissipation ◽  
Cellular Automata ◽  
Quantum Dot ◽  
Single Layer ◽  
Quantum Dot Cellular Automata

scholarly journals Energy dissipation dataset for reversible logic gates in quantum dot-cellular automata

Data in Brief ◽  
2017 ◽  
Vol 10 ◽  
pp. 557-560 ◽  
Author(s):  
Ali Newaz Bahar ◽  
Mohammad Maksudur Rahman ◽  
Nur Mohammad Nahid ◽  
Md. Kamrul Hassan
Keyword(s):  
Energy Dissipation ◽  
Cellular Automata ◽  
Quantum Dot ◽  
Logic Gates ◽  
Reversible Logic ◽  
Quantum Dot Cellular Automata ◽  
Reversible Logic Gates

Rotated majority gate-based 2n-bit full adder design in quantum-dot cellular automata nanotechnology

Circuit World ◽  
2021 ◽  
Vol ahead-of-print (ahead-of-print) ◽  
Author(s):  
Sankit Kassa ◽  
Prateek Gupta ◽  
Manoj Kumar ◽  
Thompson Stephan ◽  
Ramani Kannan
Keyword(s):  
Energy Dissipation ◽  
Cellular Automata ◽  
Quantum Dot ◽  
Circuit Design ◽  
Mathematical Proof ◽  
Average Energy ◽  
Full Adder ◽  
Majority Gate ◽  
Content Type ◽  
Quantum Dot Cellular Automata

Purpose In nano-scale-based very large scale integration technology, quantum-dot cellular automata (QCA) is considered as a strong and capable technology to replace the well-known complementary metal oxide semiconductor technology. In QCA technique, rotated majority gate (RMG) design is not explored greatly, and therefore, its advantages compared to original majority gate are unnoticed. This paper aims to provide a thorough observation at RMG gate with its capability to build robust circuits. Design/methodology/approach This paper presents a new methodology for structuring reliable 2n-bit full adder (FA) circuit design in QCA utilizing RMG. Mathematical proof is provided for RMG gate structure. A new 1-bit FA circuit design is projected here, which is constructed with RMG gate and clock-zone-based crossover approach in its configuration. Findings A new structure of a FA is projected in this paper. The proposed design uses only 50 number of QCA cells in its implementation with a latency of 3 clock zones. The proposed 1-bit FA design conception has been checked for its structure robustness by designing various 2, 4, 8, 16, 32 and 64-bit FA designs. The proposed FA designs save power from 46.87% to 25.55% at maximum energy dissipation of circuit level, 39.05% to 23.36% at average energy dissipation of circuit-level and 42.03% to 37.18% at average switching energy dissipation of circuit level. Originality/value This paper fulfills the gape of focused research for RMG with its detailed mathematical modeling analysis.

scholarly journals A novel 3-input XOR function implementation in quantum dot-cellular automata with energy dissipation analysis

2018 ◽  
Vol 57 (2) ◽  
pp. 729-738 ◽  
Author(s):  
Ali Newaz Bahar ◽  
Sajjad Waheed ◽  
Nazir Hossain ◽  
Md. Asaduzzaman
Keyword(s):  
Energy Dissipation ◽  
Cellular Automata ◽  
Quantum Dot ◽  
Quantum Dot Cellular Automata

Energy Efficient Configurable Layout of Logic Block in QCA frame work for an FPGA

2020 ◽  
Vol 12 ◽  
Author(s):  
Arindam Sadhu ◽  
Rimpa Dey Sarkar ◽  
Kunal Das ◽  
Debashis De ◽  
Maitreyi Ray Kanjilal
Keyword(s):  
Energy Dissipation ◽  
Cellular Automata ◽  
Quantum Dot ◽  
Embedded System ◽  
Power Dissipation ◽  
Energy Efficient ◽  
Average Energy ◽  
Flip Flop ◽  
Quantum Dot Cellular Automata ◽  
Logic Block

Aims: Embedded system plays a vital role in today’s life. Hence our motivation is concentrated on area-delay-energy efficient embedded system design in post-CMOS technology i.e. QCA. Objectives: The research is focused on area-delay-energy efficient configurable logic block (CLB) design for field programmable gate array architecture (FPGA) with successful simulation based on a next generation technology, Quantum-dot cellular automata. Methodology: Each proposed circuits are designed in post CMOS 4 dot 2 electron technology i.e. QCA(Quantum Dot Cellular Automata) which has been adopted in circuit implementation due to Low power dissipation, high clock frequency and high package density. Functionality of every circuit is verified by QCADesigner. QCAPro tool is used for power dissipation measurement. Results: In contrast a new approach of using de-multiplexer replacing the decoder has been introduced which results in reduction of the average energy dissipation almost 57%. A NOR based D flip-flop memory architecture and multiplexer is also used in the look up table for the configurable logic block. The proposed architecture thus reduces the overall latency. Proposed CLB is consists of 6356 number of QCA cell with covering 7.44 um2 area. Write and read latency of proposed CLB is 12 and 7.25 QCA clock respectively. Conclusion: The presented paper concludes those read and write latency reduction occurs; average energy dissipation, leakage and switching energy dissipation has been reduced massively and ensues an advantage of overall reduction of the latency for the proposed CLB in the process.

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