scholarly journals Detection of Disturbance in Distribution System Using Mathematical Morphology

2019 ◽  
Vol 9 (1S) ◽  
pp. 395-399
Keyword(s):  
Real Time ◽  
Mathematical Morphology ◽  
Distribution System ◽  
Time Distribution ◽  
Distribution Model ◽  
Structural Element ◽  
Nonlinear Loads ◽  
Nonlinear Load ◽  
Linear And Nonlinear ◽  
Disturbance Detection

Detection of disturbances is performed using Mathematical Morphology (MM) technique. A 33kV real time distribution model used to simulate the disturbance such as capacitance switching, load switching and line to ground (L-G) fault for both linear and nonlinear loads. MATLAB/SIMULINK software is used for analysis. A suitable MM filter and Structural Element (SE) is proposed for the disturbance detection. Distinguishing PSD (PSD) Energy and SD (SD) values calculated using Parsevals theorem. The proposed MM filter is very powerful to distinguish PSD due to linear and nonlinear load.

Modified DSTATCOM Topology with Reduced DC Link Voltage for Reactive and Harmonic Power Compensation of Unbalanced Nonlinear Load in Distribution System

2014 ◽  
Vol 15 (3) ◽  
pp. 263-277 ◽  
Author(s):  
Nagesh Geddada ◽  
Srinivas B. Karanki ◽  
Mahesh K. Mishra
Keyword(s):  
Distribution System ◽  
Experimental Studies ◽  
Current Control ◽  
Control Technique ◽  
Voltage Source ◽  
Nonlinear Loads ◽  
Nonlinear Load ◽  
Hysteresis Current Control ◽  
Switching Losses ◽  
Power Switches

Abstract This paper proposes a modified four-leg distribution static compensator (DSTATCOM) topology for compensation of unbalanced and nonlinear loads in three-phase four-wire distribution system. DSTATCOM, connected in parallel to the load, supplies reactive and harmonic powers demanded by unbalanced nonlinear loads. In this proposed topology, the voltage source inverter (VSI) of DSTATCOM is connected to point of common coupling (point of interconnection of source, load, DSTATCOM) through interface inductor and series capacitance, unlike the conventional topology which consists of interface inductor alone. Load compensation with a lower value of input DC link voltage of VSI is possible in this modified topology compared to conventional topology. A comparative study on modified and conventional topologies in terms of voltage rating of inverter power switches, switching losses in VSI and power rating of input DC capacitor of VSI is presented. The detailed design aspects of DC link capacitor and interface series capacitor are also presented. The reference filter currents are generated using instantaneous symmetrical component theory and are tracked using hysteresis current control technique. A detailed simulation study is carried out, to compare the compensation performances of conventional, modified topologies using PSCAD simulator and experimental studies are done to validate the simulation results.

Design of Efficient Power Filter with Reduced Distortion Using Control Algorithm

IJOSTHE ◽  
2020 ◽  
pp. 1-10
Author(s):  
Rahul Dhakad ◽  
Dr. Rakesh Saxena
Keyword(s):  
Distribution System ◽  
Output Voltage ◽  
Harmonic Distortion ◽  
Total Harmonic Distortion ◽  
Renewable Energy Resources ◽  
Nonlinear Loads ◽  
Nonlinear Load ◽  
Power Filter ◽  
Distortion Level ◽  
Voltage Output

The electrical distribution system is facing undesirable power quality disturbances due to different types of linear/nonlinear loads on the supply system. The objective of the project is to reduce the distortion level in voltage or current input to the load and at the output of the filter. To design a simple but highly viable hybrid active power buffer that is capable of feeding less distorted voltage to the nonlinear load model. To present an optimal controlling of these buffers so as to minimize the voltage distortion by designing a different algorithm for the same. Comparing the THD levels of the output voltage waveform with the standard controlling method with the proposed control design to further enhance the proposed design such that it is practically feasible to be implemented in grid system having renewable energy resources. In this work, a power filter has been designed using different algorithms with an objective to reduce the Total Harmonic Distortion in the voltage output waveforms. The total harmonic distortion in the voltage output waveform being fed to the load using only the PQ_RLS algorithm is found to be 2.18 %. In the case of the output voltage from the power buffer using PQ_RLS algorithm, the THD level is 0.17 %. The distortion level in the output voltage waveforms in both the cases being fed to the load when compared, it is found that RLS algorithm in combination with PQ algorithm is more effective in reducing the distortion as compared to standard RLS method or PQ method.

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