scholarly journals Implementation of Digital Signal Processing for Monitoring Plant Health

the diseases of plants is one of the major reason behind the reduction in the amount and quality of agricultural productivity. Great difficulties are encountered by farmers for the control and diagnosis of diseases of plants. Thus it becomes crucial to detect the diseases of plants during the initial stages for the suitable and timely action in order to avoid further losses. The approach of image processing is followed for detecting the diseases of cashew plants in this project. The image of leaf is uploaded on the system for the identification of cashew disease. A set of algorithms are used in a system for the identification of type of disease. The several processing steps are followed at the image given as input for the detection of disease and results are displayed to the user via android application.

2020 ◽  
Vol 29 (14) ◽  
pp. 2050233
Author(s):  
Zhixi Yang ◽  
Xianbin Li ◽  
Jun Yang

As many digital signal processing (DSP) applications such as digital filtering are inherently error-tolerant, approximate computing has attracted significant attention. A multiplier is the fundamental component for DSP applications and takes up the most part of the resource utilization, namely power and area. A multiplier consists of partial product arrays (PPAs) and compressors are often used to reduce partial products (PPs) to generate the final product. Approximate computing has been studied as an innovative paradigm for reducing resource utilization for the DSP systems. In this paper, a 4:2 approximate compressor-based multiplier is studied. Approximate 4:2 compressors are designed with a practical design criterion, and an approximate multiplier that uses both truncation and the proposed compressors for PP reduction is subsequently designed. Different levels of truncation and approximate compression combination are studied for accuracy and electrical performance. A practical selection algorithm is then leveraged to identify the optimal combinations for multiplier designs with better performance in terms of both accuracy and electrical performance measurements. Two real case studies are performed, i.e., image processing and a finite impulse response (FIR) filter. The design proposed in this paper has achieved up to 16.96% and 20.81% savings on power and area with an average signal-to-noise ratio (SNR) larger than 25[Formula: see text]dB for image processing; similarly, with a decrease of 0.3[Formula: see text]dB in the output SNR, 12.22% and 30.05% savings on power and area have been achieved for an FIR filter compared to conventional multiplier designs.


Author(s):  
E.B. Solovyeva ◽  
◽  
K.S. Ezerov ◽  
Yu.M. Inshakov ◽  
◽  
...  

A half-wave diode rectifier is represented as a nonlinear circuit to study in a laboratory course of electrical engineering. The control and measurement complex NI ELVIS effectively displays the nonlinear circuit properties using oscillograms and spectrograms of signals. The coefficients of ripples and nonlinear distortions are calculated. They help to evaluate the influence of the circuit parameters on the quality of signal conversion when rectifying and detecting. The advantages of the NI ELVIS complex consist in, for instance, the real-time digital signal processing, the visualization of results, the ergonomic visualization tools. These advantages provide clarity and precision in the presentation of complex nonlinear processes in electrical engineering.


2013 ◽  
Vol 107 (1) ◽  
pp. 46-53 ◽  
Author(s):  
Jason Silverman ◽  
Gail L. Rosen ◽  
Steve Essinger

Use digital signal processing to capitalize on an exciting intersection of mathematics and popular culture.


2010 ◽  
Vol 56 (4) ◽  
pp. 345-350
Author(s):  
Mariusz Rawski

Modified Distributed Arithmetic Concept for Implementations Targeted at Heterogeneous FPGAsDistributed Arithmetic (DA) plays an important role in designing digital signal processing modules for FPGA architectures. It allows replacing multiply-and-accumulate (MAC) operations with combinational blocks. The quality of implementations based on DA strongly depends on efficiency of methods that map combinational DA block into FPGA resources. Since modern FPGAs have heterogeneous structure, there is a need for quality algorithms to target these structures and the need for flexible architecture exploration aiding in appropriate mapping. The paper presents a modification of DA concept that allows for very efficient implementation in heterogeneous FPGA architectures.


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