Real-time Foreground Object Detection Combining the PBAS Background Modelling Algorithm and Feedback from Scene Analysis Module

The article presents a hardware implementation of the foreground object detection algorithm PBAS (Pixel-Based Adaptive Segmenter) with a scene analysis module. A mechanism for static object detection is proposed, which is based on consecutive frame differencing. The method allows to distinguish stopped foreground objects (e.g. a car at the intersection, abandoned luggage) from false detections (so-called ghosts) using edge similarity. The improved algorithm was compared with the original version on popular test sequences from the changedetection.net dataset. The obtained results indicate that the proposed approach allows to improve the performance of the method for sequences with the stopped objects. The algorithm has been implemented and successfully verified on a hardware platform with Virtex 7 FPGA device. The PBAS segmentation, consecutive frame differencing, Sobel edge detection and advanced one-pass connected component analysis modules were designed. The system is capable of processing 50 frames with a resolution of 720 × 576 pixels per second

Analog Reconfigurable Circuits

The aim of this paper is to present an overview of a new branch of analog electronics represented by analog reconfigurable circuits. The reconfiguration of analog circuits has been known and used since the beginnings of electronics, but the universal reconfigurable circuits called Field Programmable Analog Arrays (FPAA) have been developed over the last two decades. This paper presents the classification of analog circuit reconfiguration, examples of FPAA solutions obtained as academic projects and commercially available ones, as well as some application examples of the dynamic reconfiguration of FPAA

Fully Analytical Characterization of the Series Inductance of Tapered Integrated Inductors

In this paper a general method for the determination of the series inductance of polygonal tapered inductors is presented. The value obtained can be integrated into any integrated inductor lumped element model, thus granting the overall characterization of the device and the evaluation of performance parameters such as the quality factor or the resonance frequency. In this work, the inductor is divided into several segments and the corresponding self and mutual inductances are calculated. In the end, results obtained for several working examples are compared against electromagnetic (EM) simulations are performed in order to check the validity of the model for square, hexagonal, octagonal and tapered inductors. The proposed method depends exclusively on the geometric characteristics of the inductor as well as the technological parameters. This allows its straight forward application to any inductor shape or technology.

Tracing Fault Effects in FPGA Systems

The paper presents the extent of fault effects in FPGA based systems and concentrates on transient faults (induced by single event upsets - SEUs) within the configuration memory of FPGA. An original method of detailed analysis of fault effect propagation is presented. It is targeted at microprocessor based FPGA systems using the developed fault injection technique. The fault injection is performed at HDL description level of the microprocessor using special simulators and developed supplementary programs. The proposed methodology is illustrated for soft PicoBlaze microprocessor running 3 programs. The presented results reveal some problems with fault handling at the software level.

CMOS Readout Circuit Integrated with Ionizing Radiation Detectors

This paper describes the work performed in ITE on integration in one CMOS chip the ionizing radiation detectors with dedicated readout electronics. At the beginning, some realizations of silicon detectors of ionizing radiation are presented together with most important issues related to these devices. Next, two developed test structures for readout electronics are discussed in detail together with main features of non-typical silicon process deployed.

About Implementation of IEC 61131-3 IL Function Blocks in Standard Microcontrollers

The paper presents considerations on implementation of function blocks of the IL language, as fragments of control programs that use these blocks. Subsequently, the predefined function blocks of the IL language have been applied to implementation in a Central Processing Unit for a programmable controller based on standard microcontroller from such families as MCS-51, AVR and ARM with the Cortex-M3 core. The considerations refer to the IL language revision that is fully compliant with the IEC-61131-3 standards. The completed theoretical analysis demonstrated that the adopted method of the module description is really reasonable and offers substantial advantages as compared to direct calls of function modules already developed as subroutines. Also the executed experiments have proved the feasibility to arrange central units of programmable controllers on the basis of standard microcontrollers and such central units may be competitive to compact CPUs available on the market for typical PLCs.

Fusion 2050 – European and Polish Perspective

Fusion, in all its varieties, is a very current subject of science and technology. The results of strongly exothermic reaction of thermonuclear fusion between nuclei of deuterium and tritium are: helium nuclei and neutrons, plus considerable kinetic energy of neutrons of over 14 MeV. DT nuclides synthesis reaction is probably not the most favorable one for energy production, but is the most advanced technologically. More efficient would be possibly an aneutronic fusion. The EU by its EURATOM agenda prepared a Road Map for research and implementation of Fusion as a commercial method of thermonuclear energy generation in the time horizon of 2050.The milestones on this road are tokomak experiments JET, ITER and DEMO, and neutron experiment IFMIF. There is a hope, that by engagement of the national government, and all research and technical fusion and plasma communities, part of this Road Map may be realized in Poland. The infrastructure build for fusion experiments may be also used for material engineering research, chemistry, biomedical, associated with environment protection, power engineering, security, etc. Construction of such research and industrial accelerator and tokomak infrastructure may have potentially a profound meaning for the development of science and technology in Poland.

Design of an Ultra-Low Power CT ΣΔ A/D Modulator in 65 nm CMOS for Cardiac Pacemakers: From System Synthesis to Circuit Implementation

A high performance, ultra-low power, fully differential 2nd-order continuous-time ΣΔ analogue-to-digital modulator for cardiac pacemakers is presented in this paper. The entire design procedure is described in detail from the high-level system synthesis in both discrete and continuous-time domain, to the low-level circuit implementation of key functional blocks of the modulator. The power consumption of the designed modulator is rated at 182 nA from a 1.2V power supply, meeting the ultra-low power requirement of the cardiac pacemaker applications. A 65 nm CMOS technology is employed to implement the ΣΔ modulator. The modulator achieves a simulated SNR of 53.8 dB over a 400Hz signal bandwidth, with 32KHz sampling frequency and an oversampling ratio of 40. The active area of the modulator is 0.45 × 0.50mm2

Analytical Models for Distribution of the Envelope and Phase of Linearly Modulated Signals in AWGN Channel

In this paper, analytical expressions for the distribution of the envelope and phase of linearly modulated signals such as BPSK,M-PSK, andM-QAM in AWGN are presented.We perform numerical simulations for different orders of signal constellations. The results show that the proposed theoretical models are in excellent agreement with the estimated distributions from various numerical experiments.

Impact of Filter Characteristics and Optical Signal Parameters on Interchannel Crosstalk

In this paper we present analysis of the influence of filter characteristics of Wavelength Division Multiplexing network components and transmission parameters over interchannel crosstalk for symmetric and asymmetric transmission. The simulation was carried out for bit rate 10 Gb/s, 40 Gb/s and 100 Gb/s considering the following modulations: DPSK, DQPSK and OOK. The obtained results show that OOK and DQPSK modulation are better than DPSK modulation in terms of crosstalk occurring during the transmission of signals in Wavelength Division Multiplexing systems.