Design and Implementation of Intelligent Digital Photo Frame Based on FPGA

2013 ◽  
Vol 380-384 ◽  
pp. 3296-3299
Author(s):  
Dan Dan Han ◽  
Tian Chi Zhang ◽  
Jing Zhang

SOPC technology of Nios II is Used for the design of intelligent digital photo frame in this paper. Developers can integrate design according to actual needs, fundamentally changing the lack of traditional design. Digital photo frame as a whole project is divided into two parts of the hardware module and software system. Functional correctness is verified by Quartus II, further downloaded to the FPGA for debugging, the observation results showed that digital photo frame has a high degree of freedom in the system optimization, which can be extended the life of the product on the market, greatly improving the performance of multi-function digital photo frame.

2010 ◽  
Vol 40-41 ◽  
pp. 985-989
Author(s):  
Jing Xiong ◽  
Han Yun Wen ◽  
Kai Bai

At present, the existing embedded database products have high degree of specialization and dependencies of platform, not fully reflect the characteristics of embedded system. This paper provides a requirement analysis and gives a completely different from the traditional design of the database, the paper has done a lot of research in some key technologies on the design and implementation of SOC technology, this design is always used in cross platform embedded database. The SOC technology embedded in a database system in the special chip to solve problems of platform portability.


Author(s):  
Tchahou Tchendjeu A. E ◽  
Tchitnga Robert ◽  
Fotsin Hilaire B

<p>This paper presents the Design and implementation into Field ProgrammableGate Array (FPGA) of a combine stream cipher and a simple linear congruential generator circuit to produce key stream. The LCG circuit is used to produce initialization vector (IV) each 2<sup>64</sup> clock cycle to the cipher trivium in other to strengthen the complexity of the cipher to known attacks on trivium. The LCGTrivium is designed to generate 2<sup>144</sup> bits of keystream from an 80-bits secret and a variable 80-bits initial value. To implement the LCG-Trivium on FPGA, we use VHDL to build a simple LCG and Trivium and a state machine to synchronize the functioning of the LCG and Trivium. The number of gates, memory and speed requirement on FPGA is giving after analysis. The design is simulated, synthesized and implemented in Quartus II 10.1, ModelSim-Altera 6.5 and Cyclone IV E EP4CE115F29C7N.</p>


1987 ◽  
Vol 24 (02) ◽  
pp. 131-142
Author(s):  
Warren F. Smith ◽  
Saiyid Kamal ◽  
Farrokh Mistree

The design of engineering systems involves the design of dependent subsystems and the integration of these into a whole. A typical system has the characteristics of being multileveled, multidimensional, and multidisciplined in nature. It is this complexity which causes problems for the designer in making well-founded decisions. A decision support technique has been developed which offers a structured facility for the design of the subsystems and for the modeling of the interaction which is present between subsystems. The method, employing optimization procedures, allows all aspects of the system design to be considered concurrently, to produce the "best" solution, as defined by the specifications. This is in contrast to the traditional design method, which is iterative and cyclic in nature, involving sequential reevaluation and refinement. In this paper, the effectiveness and efficiency of the decision support problem approach is demonstrated using the hierarchical characteristics of a design for a barge. The barge problem, though basic in form, is comprehensive in concept and tutorial in nature. As a formulation for "system" optimization, it uses a computer-based method for solution and illustrates the virtues of a multilevel/multidisciplinary approach to design and decision-making. It also exhibits the same characteristics and provides valuable insight into the solution of the more complex problems encountered in practical ship design.


2012 ◽  
Vol 3 (4) ◽  
pp. 27-44
Author(s):  
Bernard Spitz ◽  
Riccardo Scandariato ◽  
Wouter Joosen

This paper presents the design and implementation of a prototype tool for the extraction of the so-called Task Execution Model directly from the source code of a software system. The Task Execution Model is an essential building block for the analysis of the least privilege violations in a software architecture (presented in previous work). However, the trustworthiness of the analysis results relies on the correspondence between the analyzed model and the implementation of the system. Therefore, the tool presented here is a key ingredient to provide assurance that the analysis results are significant for the system at hand.


Author(s):  
Deepak Kumar Sharma ◽  
Naveen Prakash ◽  
Manish Mahajan ◽  
Dheerendra Singh

2011 ◽  
Vol 128-129 ◽  
pp. 1334-1338
Author(s):  
Guo Shun Chen ◽  
Yan Mei Lv ◽  
Ming Fei Xia

Based on the functions and performance analysis of networked virtual instrument (NVI) system, this paper design and implementation the software system of a NVI with the .NET platform. And carry out an in-depth analysis of the software system, especially the key techniques including databases, DataSocket and multithreading. The system uses ASP.NET, C# for development server pages, the instrument operation instructions embedded in Web pages using ActiveX techniques. Using VC to development VI server applications, and through DataSocket to transfer testing data. The testing results show that the software system is operating well, the NVI system achieves a convenient user and testing resource management, and making the system more users to share testing equipment to improve efficiency.


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