Research on Algorithm in Fast Modular Exponentiation Based on FPGA

2013 ◽  
Vol 433-435 ◽  
pp. 499-502
Author(s):  
Lian Qing Zhao ◽  
Shu Li ◽  
Yuan Xun Chen ◽  
Dong Jun Liu

Modular exponentiation of large number is widely applied in public-key cryptosystem, also the bottleneck in the computation of public-key algorithm. Modular multiplication is the key calculation in modular exponentiation. An improved Montgomery algorithm is utilized to achieve modular multiplication and converted into systolic array to increase the running frequency. A high efficiency fast modular exponentiation structure is developed on FPGA to bring the best out of the modular multiplication module and enhance the ability of defending timing attacks and power attacks. For 1024 bit key operands, the design can be run at 170MHz.

Author(s):  
Johannes Mittmann ◽  
Werner Schindler

AbstractMontgomery’s and Barrett’s modular multiplication algorithms are widely used in modular exponentiation algorithms, e.g. to compute RSA or ECC operations. While Montgomery’s multiplication algorithm has been studied extensively in the literature and many side-channel attacks have been detected, to our best knowledge no thorough analysis exists for Barrett’s multiplication algorithm. This article closes this gap. For both Montgomery’s and Barrett’s multiplication algorithm, differences of the execution times are caused by conditional integer subtractions, so-called extra reductions. Barrett’s multiplication algorithm allows even two extra reductions, and this feature increases the mathematical difficulties significantly. We formulate and analyse a two-dimensional Markov process, from which we deduce relevant stochastic properties of Barrett’s multiplication algorithm within modular exponentiation algorithms. This allows to transfer the timing attacks and local timing attacks (where a second side-channel attack exhibits the execution times of the particular modular squarings and multiplications) on Montgomery’s multiplication algorithm to attacks on Barrett’s algorithm. However, there are also differences. Barrett’s multiplication algorithm requires additional attack substeps, and the attack efficiency is much more sensitive to variations of the parameters. We treat timing attacks on RSA with CRT, on RSA without CRT, and on Diffie–Hellman, as well as local timing attacks against these algorithms in the presence of basis blinding. Experiments confirm our theoretical results.


2010 ◽  
Vol 20-23 ◽  
pp. 505-511
Author(s):  
Xuan Wu Zhou

Compared with symmetric cryptosystem, asymmetric cryptosystem has much superiority in many application cases. Yet, the computation in a public key cryptosystem is much more complex than symmetric cryptosystem. In the paper, we applied HCC (Hyper-elliptic Curves Cryptosystem) as a typical fast public key cryptosystem into the designing of efficient blind signature scheme and presented an improved blind signature with fast cryptography algorithms. By utilizing probabilistic blinding algorithm, the scheme renders effective protection for the secrecy of original user, the signature generator or outer adversaries can not attack the secret message via the blinded information with effective polynomial algorithms. The scheme avoids the relevance between different signatures and interim parameters from the same original user, thus it effectively prevents signature forgery and replay attack. As security analysis for the scheme, we presented similar blind signature without relevant improving algorithms based on discrete logarithm cryptosystem. The analysis and comparison with other schemes both justify the security, reliability and high efficiency of the improved blind signature scheme regarding software and hardware application environment.


Author(s):  
Dominic Bucerzan ◽  
Pierre-Louis Cayrel ◽  
Vlad Dragoi ◽  
Tania Richmond

In this paper, we detail two side-channel attacks against the McEliece public-key cryptosystem. They are exploiting timing differences on the Patterson decoding algorithm in order to reveal one part of the secret key: the support permutation. The first one is improving two existing timing attacks and uses the correlation between two different steps of the decoding algorithm. This improvement can be deployed on all error-vectors with Hamming weight smaller than a quarter of the minimum distance of the code. The second attack targets the evaluation of the error locator polynomial and succeeds on several different decoding algorithms. We also give an appropriate countermeasure.


2017 ◽  
Vol 11 (2) ◽  
pp. 11-24
Author(s):  
Satyanarayana Vollala ◽  
B. Shameedha Begum ◽  
Amit D. Joshi ◽  
N. Ramasubramanian

It is widely recognized that the public-key cryptosystems are playing tremendously an important role for providing the security services. In majority of the cryptosystems the crucial arithmetic operation is modular exponentiation. It is composed of a series of modular multiplications. Hence, the performance of any cryptosystem is strongly depends on the efficient implementation of these operations. This paper presents the Bit Forwarding 3-bits(BFW3) technique for efficient implementation of modular exponentiation. The modular multiplication involved in BFW3 is evaluated with the help of Montgomery method. These techniques improves the performance by reducing the frequency of modular multiplications. Results shows that the BFW3 technique is able to reduce the frequency of multiplications by 18.20% for 1024-bit exponent. This reduction resulted in increased throughput of 18.11% in comparison with MME42_C2 at the cost of 1.09% extra area. The power consumption reduced by 8.53% thereby saving the energy up to 10.10%.


2020 ◽  
Vol 3 (1) ◽  
pp. 1-13
Author(s):  
M Issad ◽  
M Anane ◽  
B Boudraa ◽  
A M Bellemou ◽  
N Anane

This paper presents an FPGA implementation of the most critical operations of Public Key Cryptography (PKC), namely the Modular Exponentiation (ME) and the Modular Multiplication (MM). Both operations are integrated in Hardware (HW) as Programmable System on Chip (PSoC). The processor Microblaze of Xilinx is used for flexibility. Our objective is to achieve a best trade-off between execution time, occupied area and flexibility. In order to satisfy this constraint, Montgomery Power Ladder and Montgomery Modular Multiplication (MMM) algorithms are utilized for the ME and for the MM implementations as HW accelerators, respectively. Our implementation approach is based on the digit-serial method for performing the basic arithmetic operations. Efficient parallel and pipeline strategies are developed at the digit level for the optimization of the execution time. The application for 1024-bits data length shows that the MMM run in 6.24 µs and requires 647 slices. The ME is executed in 6.75 ms, using 2881 slices.


2013 ◽  
Vol 80 (5) ◽  
pp. 38-42
Author(s):  
G. A.V.RamaChandraRao ◽  
P. V. Lakshmi ◽  
N. Ravi Shankar

Author(s):  
Yasuhiko IKEMATSU ◽  
Dung Hoang DUONG ◽  
Albrecht PETZOLDT ◽  
Tsuyoshi TAKAGI

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