A High-Performance Signal Processing System for Monopulse Tracking Radar

2011 ◽  
Vol 383-390 ◽  
pp. 471-475
Author(s):  
Yong Bin Hong ◽  
Cheng Fa Xu ◽  
Mei Guo Gao ◽  
Li Zhi Zhao
Keyword(s):  
Signal Processing ◽  
High Performance ◽  
Dynamic Range ◽  
Signal To Noise Ratio ◽  
Processing System ◽  
Digital Signal ◽  
Radar Signal ◽  
Signal Processing System ◽  
Parallel Pipelined ◽  
Tracking Radar

A radar signal processing system characterizing high instantaneous dynamic range and low system latency is designed based on a specifically developed signal processing platform. Instantaneous dynamic range loss is a critical problem when digital signal processing is performed on fixed-point FPGAs. In this paper, the problem is well resolved by increasing the wordlength according to signal-to-noise ratio (SNR) gain of the algorithms through the data path. The distinctive software structure featuring parallel pipelined processing and “data flow drive” reduces the system latency to one coherent processing interval (CPI), which significantly improves the maximum tracking angular velocity of the monopulse tracking radar. Additionally, some important electronic counter-countermeasures (ECCM) are incorporated into this signal processing system.

A Multi-Channel Radar Signal Process System

2010 ◽  
Vol 20-23 ◽  
pp. 884-888
Author(s):  
Cheng Fa Xu ◽  
Jun Ling Wang ◽  
Rong Gang Wu
Keyword(s):  
Signal Processing ◽  
High Performance ◽  
Processing System ◽  
General Purpose ◽  
Radar Signal ◽  
Radar Signal Processing ◽  
Signal Processing System ◽  
Signal Processing Algorithm ◽  
High Data ◽  
Advantages And Disadvantages

In order to meet multi-channel, high data rate, intensive computing capacity of modern radar signal processing, a standard, scalable, high-performance general-purpose radar signal processing system platform is proposed. The main processor of this system platform is the DSP and FPGA. In the analysis of different kinds of radar signal processing algorithm, and taking into account the respective advantages and disadvantages of DSP and FPGA, In this paper, a software architecture method for radar signal processing is given to decide how to distribute different algorithm into DSP and FPGA. At last, for a certain type of circular array radar, an implementation of radar signal processing by using the general-purpose radar signal processing system platform is proposed.

scholarly journals HIPSR: A Digital Signal Processor for the Parkes 21-cm Multibeam Receiver

2016 ◽  
Vol 05 (04) ◽  
pp. 1641007 ◽  
Author(s):  
D. C. Price ◽  
L. Staveley-Smith ◽  
M. Bailes ◽  
E. Carretti ◽  
A. Jameson ◽  
...  
Keyword(s):  
Signal Processing ◽  
High Speed ◽  
Dynamic Range ◽  
Processing System ◽  
Digital Signal ◽  
Complex Signal ◽  
High Time Resolution ◽  
Radio Bursts ◽  
Signal Processing System ◽  
Intensity Mapping

HIPSR (HI-Pulsar) is a digital signal processing system for the Parkes 21-cm Multibeam Receiver that provides larger instantaneous bandwidth, increased dynamic range, and more signal processing power than the previous systems in use at Parkes. The additional computational capacity enables finer spectral resolution in wideband HI observations and real-time detection of Fast Radio Bursts during pulsar surveys. HIPSR uses a heterogeneous architecture, consisting of FPGA-based signal processing boards connected via high-speed Ethernet to high performance compute nodes. Low-level signal processing is conducted on the FPGA-based boards, and more complex signal processing routines are conducted on the GPU-based compute nodes. The development of HIPSR was driven by two main science goals: to provide large bandwidth, high-resolution spectra suitable for 21-cm stacking and intensity mapping experiments; and to upgrade the Berkeley–Parkes–Swinburne Recorder (BPSR), the signal processing system used for the High Time Resolution Universe (HTRU) Survey and the Survey for Pulsars and Extragalactic Radio Bursts (SUPERB).

Design of Virtex-7 FPGA-Based High-Speed Signal Processor Carrier Board

2015 ◽  
Vol 719-720 ◽  
pp. 534-537
Author(s):  
Wen Hua Ye ◽  
Huan Li
Keyword(s):  
Signal Processing ◽  
Digital Signal Processing ◽  
High Speed ◽  
Processing System ◽  
Digital Signal ◽  
Signal Processing System ◽  
High Speed Adc ◽  
High Speed Data ◽  
Processor Speed ◽  
Signal Processor

With the development of digital signal processing technology, the demand on the signal processor speed has become increasingly high. This paper describes the hardware design of carrier board in high-speed signal processing module, which using Xilinx's newest Virtex-7 FPGA family XC7VX485T chip, and applying high-speed signal processing interface FMC to transport and communicate high-speed data between carrier board and daughter card with high-speed ADC and DAC. This design provides a hardware implementation and algorithm verification platform for high-speed digital signal processing system.

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