scholarly journals A Low Power Front End Analog Multiplexing Unit for 12 Lead ECG Signal Acquisition

2014 ◽  
Vol 5 (3) ◽  
pp. 59-72
Author(s):  
Hari Priya D ◽  
Rama Krishna P ◽  
Sastry A.S.C.S ◽  
Rao K.S
2018 ◽  
Vol 8 (3) ◽  
pp. 27 ◽  
Author(s):  
Avish Kosari ◽  
Jacob Breiholz ◽  
NingXi Liu ◽  
Benton Calhoun ◽  
David Wentzloff

This paper presents a power efficient analog front-end (AFE) for electrocardiogram (ECG) signal monitoring and arrhythmia diagnosis. The AFE uses low-noise and low-power circuit design methodologies and aggressive voltage scaling to satisfy both the low power consumption and low input-referred noise requirements of ECG signal acquisition systems. The AFE was realized with a three-stage fully differential AC-coupled amplifier, and it provides bio-signal acquisition with programmable gain and bandwidth. The AFE was implemented in a 130 nm CMOS process, and it has a measured tunable mid-band gain from 31 to 52 dB with tunable low-pass and high-pass corner frequencies. Under only 0.5 V supply voltage, it consumes 68 nW of power with an input-referred noise of 2.8 µVrms and a power efficiency factor (PEF) of 3.9, which makes it very suitable for energy-harvesting applications. The low-noise 68nW AFE was also integrated on a self-powered physiological monitoring System on Chip (SoC) that is used to capture ECG bio-signals. Heart rate extraction (R-R) detection algorithms were implemented and utilized to analyze the ECG data received by the AFE, showing the feasibility of <100 nW AFE for continuous ECG monitoring applications.


2021 ◽  
Author(s):  
Dimiter H. Badarov ◽  
Georgy S. Mihov ◽  
Ivo Ts. Iliev

Author(s):  
Ow Tze Weng ◽  
Suhaila Isaak ◽  
Yusmeeraz Yusof

The trend of health care screening devices in the world is increasingly towards the favor of portability and wearability. This is because these wearable screening devices are not restricting the patient’s freedom and daily activities. While the demand of low power and low cost biomedical system on chip is increasing in exponential way, the front-end electrocardiogram (ECG) amplifiers are still suffering from flicker noise for low frequency cardiac signal acquisition, 50Hz power line electromagnetic interference, and the large unstable input offsets due to the electrode-skin interface is not attached properly. In this paper, a CMOS based ECG amplifier that suitable for low power wearable cardiac screening is proposed. The amplifier adopts the highly stable folded cascode topology and later being implemented into RC feedback circuit for low frequency DC offset cancellation. By using  0.13µm CMOS technology from Silterra, the simulation results show that this front-end circuit can achieve a very low input referred noise of  1pV/Hz1/2 and high common mode rejection ratio of 174.05dB. It also gives voltage gain of 75.45dB with good power supply rejection ratio of 92.12dB. The total power consumption is only 3µW and thus suitable to be implemented with further signal processing and classification back end for low power wearable biomedical device.<br /><br />


2008 ◽  
Vol 2 (4) ◽  
pp. 280-288 ◽  
Author(s):  
Alex K. Y. Wong ◽  
Kong-Pang Pun ◽  
Yuan-Ting Zhang ◽  
Ka Nang Leung

Author(s):  
Deepa Kota ◽  
Nishat Tasneem ◽  
Karthik Kakaraparty ◽  
Ifana Mahbub ◽  
Gayatri Mehta ◽  
...  

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