Development of Digital Signal Receiving Equipment for Electronic Warfare

Author(s):  
Sunghoon Kim ◽  
Hyeokjae Choi ◽  
Jaeyun Kim ◽  
Byungjin Moon ◽  
Jonghyun Lee
2022 ◽  
Vol 2022 ◽  
pp. 1-11
Author(s):  
Hongyan Mao

Traditional electronic countermeasure incident intelligence processing has problems such as low accuracy and stability and long processing time. A method of electronic countermeasure incident intelligence processing based on communication technology is proposed. First, use the integrated digital signal receiver to identify various modulation methods in the complex signal environment to facilitate the processing and transmission of communication signals, then establish an electronic countermeasure intelligence processing framework with Esper as the core, and flow the situation to the processing conclusion through the PROTOBUF interactive format Redis cache. The data can realize the intelligent processing of electronic countermeasure incidents. The experimental results show that the method proposed in this paper increases the recall rate by 5 to 20% compared with other methods. This method has high accuracy and stability for electronic countermeasure incident intelligence processing and can effectively shorten the time for electronic countermeasure incident intelligence processing.


2003 ◽  
Vol 13 (01) ◽  
pp. 221-237
Author(s):  
KARL E. FRITZ ◽  
BARBARA A. RANDALL ◽  
GREGG J. FOKKEN ◽  
MICHAEL J. DEGERSTROM ◽  
MICHAEL J. LORSUNG ◽  
...  

Under the auspices of Defense Advanced Research Project Agency's Microsystems Technology Office (DARPA/MTO) Low Power Electronics Program, the Mayo Foundation Special Purpose Processor Development Group is exploring ways to reduce circuit power consumption, while maintaining or increasing functionality, for existing military systems. Applications presently being studied include all-digital radar receivers, electronic warfare receivers, and other types of digital signal processors. One of the integrated circuit technologies currently under investigation to support such military systems is the IBM Corporation silicon germanium (SiGe) BiCMOS process. In this paper, design methodology, simulations and test results from demonstration circuits developed for these applications and implemented in the IBM SiGe BiCMOS 5HP (50 GHz fT HBTs with 0.5 μm CMOS) and 7HP (120 GHz fT HBTs with 0.18 μm CMOS) technologies will be presented.


2005 ◽  
Vol 2 (10) ◽  
pp. 414-429 ◽  
Author(s):  
Douglas J. Fouts ◽  
Kendrick R. Macklin ◽  
Daniel P. Zulaica ◽  
Russell W. Duren

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