VLSI Architecture for Configurable and Low-Complexity Design of Hard-Decision Viterbi Decoding Algorithm

Journal of ICT Research and Applications ◽

10.5614/itbj.ict.res.appl.2016.10.1.5 ◽

2016 ◽

Vol 10 (1) ◽

pp. 57-75

Author(s):

Rachmad Vidya Wicaksana Putra ◽

◽

Trio Adiono ◽

Keyword(s):

Vlsi Architecture ◽

Low Complexity ◽

Viterbi Decoding ◽

Decoding Algorithm ◽

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High-speed parallel Viterbi decoding: algorithm and VLSI-architecture

IEEE Communications Magazine ◽

10.1109/35.79382 ◽

1991 ◽

Vol 29 (5) ◽

pp. 46-55 ◽

Author(s):

G. Fettweis ◽

H. Meyr

Keyword(s):

Vlsi Architecture ◽

Viterbi Decoding ◽

Decoding Algorithm

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A configurable and low complexity hard-decision viterbi decoder in VLSI architecture

2014 2nd International Conference on Information and Communication Technology (ICoICT) ◽

10.1109/icoict.2014.6914062 ◽

2014 ◽

Author(s):

Rachmad Vidya Wicaksana Putra ◽

Trio Adiono

Keyword(s):

Vlsi Architecture ◽

Low Complexity ◽

Viterbi Decoder ◽

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A low complexity VLSI architecture for MIMO sphere decoding algorithm

2009 Joint IEEE North-East Workshop on Circuits and Systems and TAISA Conference ◽

10.1109/newcas.2009.5290429 ◽

2009 ◽

Author(s):

Ramin Shariat-Yazdi ◽

Tad Kwasniewski

Keyword(s):

Vlsi Architecture ◽

Low Complexity ◽

Sphere Decoding ◽

Decoding Algorithm

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Design Space Exploration of Hard-Decision Viterbi Decoding: Algorithm and VLSI Implementation

IEEE Transactions on Very Large Scale Integration (VLSI) Systems ◽

10.1109/tvlsi.2009.2017024 ◽

2010 ◽

Vol 18 (5) ◽

pp. 794-807 ◽

Author(s):

Irfan Habib ◽

Özgün Paker ◽

Sergei Sawitzki

Keyword(s):

Design Space Exploration ◽

Design Space ◽

Space Exploration ◽

Vlsi Implementation ◽

Viterbi Decoding ◽

Decoding Algorithm ◽

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An advanced low-complexity decoding algorithm for turbo product codes based on the syndrome

EURASIP Journal on Wireless Communications and Networking ◽

10.1186/s13638-020-01740-2 ◽

2020 ◽

Vol 2020 (1) ◽

Author(s):

Sungsik Yoon ◽

Byungkyu Ahn ◽

Jun Heo

Keyword(s):

Low Complexity ◽

Decoding Algorithm ◽

Product Codes ◽

Turbo Product Codes

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Low Complexity VLSI Architecture Design Methodology for Wigner Ville Distribution

IEEE Transactions on Circuits & Systems II Express Briefs ◽

10.1109/tcsii.2020.2992514 ◽

2020 ◽

Vol 67 (12) ◽

pp. 3532-3536

Author(s):

Suresh Mopuri ◽

Amit Acharyya

Keyword(s):

Design Methodology ◽

Vlsi Architecture ◽

Low Complexity ◽

Architecture Design

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A low-power, hard-decision analogue convolutional decoder using the modified feedback decoding algorithm

2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512) ◽

10.1109/iscas.2004.1328970 ◽

2004 ◽

Author(s):

B. Tomatsopoulos ◽

A. Demosthenous

Keyword(s):

Low Power ◽

Decoding Algorithm ◽

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Graph based low complexity MIMO detection with intermediate hard-decision

2012 Computing, Communications and Applications Conference ◽

10.1109/comcomap.2012.6154876 ◽

2012 ◽

Author(s):

Kangwoon Seo ◽

Seokhyun Yoon

Keyword(s):

Low Complexity ◽

Mimo Detection ◽

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An area-efficient analog VLSI architecture for state-parallel Viterbi decoding

ISCAS'99. Proceedings of the 1999 IEEE International Symposium on Circuits and Systems VLSI (Cat. No.99CH36349) ◽

10.1109/iscas.1999.780756 ◽

2003 ◽

Author(s):

Kai He ◽

G. Cauwenberghs

Keyword(s):

Vlsi Architecture ◽

Analog Vlsi ◽

Viterbi Decoding ◽

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High-throughput, low complexity, parametrizable VLSI architecture for full search block matching algorithm for advanced multimedia applications

ICECS'99. Proceedings of ICECS '99. 6th IEEE International Conference on Electronics, Circuits and Systems (Cat. No.99EX357) ◽

10.1109/icecs.1999.814449 ◽

2003 ◽

Author(s):

L. Fanucci ◽

R. Saletti ◽

L. Bertini ◽

P. Moio ◽

S. Saponara

Keyword(s):

High Throughput ◽

Vlsi Architecture ◽

Low Complexity ◽

Multimedia Applications ◽

Block Matching ◽

Matching Algorithm ◽

Block Matching Algorithm ◽

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