scholarly journals March Test for Static Neighborhood Pattern-Sensitive Faults in Random-Access Memories

2012 ◽  
Vol 119 (3) ◽  
Author(s):  
C. Huzum ◽  
P. Cascaval
Keyword(s):  
Random Access ◽  
March Test ◽  
Pattern Sensitive Faults

Two-Run RAM March Testing with Address Decimation

2016 ◽  
Vol 26 (02) ◽  
pp. 1750031 ◽  
Author(s):  
Ireneusz Mrozek ◽  
Vyacheslav Yarmolik
Keyword(s):  
Selection Process ◽  
Random Access ◽  
Test Session ◽  
Analytical Investigation ◽  
Fault Coverage ◽  
Test Procedures ◽  
March Test ◽  
Sequence Selection ◽  
Time Standard ◽  
March Tests

Conventional march memory tests have high fault coverage, especially for simple faults like stack-at fault (SAF), transition fault (TF) or coupling fault (CF). The same-time standard march tests, which are based on only one run, are becoming insufficient for complex faults like pattern-sensitive faults (PSFs). To increase fault coverage, the multi-run transparent march test algorithms have been used. This solution is especially suitable for built-in self-test (BIST) implementation. The transparent BIST approach presents the incomparable advantage of preserving the content of the random access memory (RAM) after testing. We do not need to save the memory content before the test session or to restore it at the end of the session. Therefore, these techniques are widely used in critical applications (medical electronics, railway control, avionics, telecommunications, etc.) for periodic testing in the field. Unfortunately, in many cases, there is very limited time for such test sessions. Taking into account the above limitations, we focus on short, two-run march test procedures based on counter address sequences. The advantage of this paper is that it defines requirements that must be taken into account in the address sequence selection process and presents a deeply analytical investigation of the optimal address decimation parameter. From the experiments we can conclude that the fault coverage of the test sessions generated according to the described method is higher than in the case of pseudorandom address sequences. Moreover, the benefit of this solution seems to be low hardware overhead in implementation of an address generator.

scholarly journals Analysis of multibackground memory testing techniques

2010 ◽  
Vol 20 (1) ◽  
pp. 191-205 ◽  
Author(s):  
Ireneusz Mrozek
Keyword(s):  
Initial Conditions ◽  
Fault Coverage ◽  
Fault Model ◽  
Memory Testing ◽  
March Test ◽  
Transition Faults ◽  
Complex Fault ◽  
Pattern Sensitive Faults ◽  
Testing Techniques ◽  
March Tests

Analysis of multibackground memory testing techniquesMarch tests are widely used in the process of RAM testing. This family of tests is very efficient in the case of simple faults such as stuck-at or transition faults. In the case of a complex fault model—such as pattern sensitive faults—their efficiency is not sufficient. Therefore we have to use other techniques to increase fault coverage for complex faults. Multibackground memory testing is one of such techniques. In this case a selected March test is run many times. Each time it is run with new initial conditions. One of the conditions which we can change is the initial memory background. In this paper we compare the efficiency of multibackground tests based on four different algorithms of background generation.

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