Minimal March Test Algorithm for Detection of Linked Static Faults in Random Access Memories

2006 ◽  
Author(s):  
G. Harutunyan ◽  
V.A. Vardanian ◽  
Y.Z. Zorian
Keyword(s):  
Random Access ◽  
March Test ◽  
Test Algorithm ◽  
Static Faults

March test algorithm for unlinked static reduced three-cell coupling faults in random-access memories

2019 ◽  
Vol 93 ◽  
pp. 104619 ◽  
Author(s):  
P. Caşcaval ◽  
D. Caşcaval
Keyword(s):  
Random Access ◽  
Cell Coupling ◽  
March Test ◽  
Coupling Faults ◽  
Test Algorithm

scholarly journals March Test for Static Neighborhood Pattern-Sensitive Faults in Random-Access Memories

2012 ◽  
Vol 119 (3) ◽  
Author(s):  
C. Huzum ◽  
P. Cascaval
Keyword(s):  
Random Access ◽  
March Test ◽  
Pattern Sensitive Faults

An extended march test algorithm for embedded memories

2002 ◽  
Author(s):  
Gang-Min Park ◽  
Hoon Chang
Keyword(s):  
March Test ◽  
Test Algorithm ◽  
Embedded Memories

Two-Run RAM March Testing with Address Decimation

2016 ◽  
Vol 26 (02) ◽  
pp. 1750031 ◽  
Author(s):  
Ireneusz Mrozek ◽  
Vyacheslav Yarmolik
Keyword(s):  
Selection Process ◽  
Random Access ◽  
Test Session ◽  
Analytical Investigation ◽  
Fault Coverage ◽  
Test Procedures ◽  
March Test ◽  
Sequence Selection ◽  
Time Standard ◽  
March Tests

Conventional march memory tests have high fault coverage, especially for simple faults like stack-at fault (SAF), transition fault (TF) or coupling fault (CF). The same-time standard march tests, which are based on only one run, are becoming insufficient for complex faults like pattern-sensitive faults (PSFs). To increase fault coverage, the multi-run transparent march test algorithms have been used. This solution is especially suitable for built-in self-test (BIST) implementation. The transparent BIST approach presents the incomparable advantage of preserving the content of the random access memory (RAM) after testing. We do not need to save the memory content before the test session or to restore it at the end of the session. Therefore, these techniques are widely used in critical applications (medical electronics, railway control, avionics, telecommunications, etc.) for periodic testing in the field. Unfortunately, in many cases, there is very limited time for such test sessions. Taking into account the above limitations, we focus on short, two-run march test procedures based on counter address sequences. The advantage of this paper is that it defines requirements that must be taken into account in the address sequence selection process and presents a deeply analytical investigation of the optimal address decimation parameter. From the experiments we can conclude that the fault coverage of the test sessions generated according to the described method is higher than in the case of pseudorandom address sequences. Moreover, the benefit of this solution seems to be low hardware overhead in implementation of an address generator.

March DSS: A New Diagnostic March Test for All Memory Simple Static Faults

2007 ◽  
Vol 26 (9) ◽  
pp. 1713-1720 ◽  
Author(s):  
Sultan M. Al-Harbi ◽  
Fadel Noor ◽  
Fadi M. Al-Turjman
Keyword(s):  
March Test ◽  
Static Faults

A New Method for March Test Algorithm Generation and Its Application for Fault Detection in RAMs

2012 ◽  
Vol 31 (6) ◽  
pp. 941-949 ◽  
Author(s):  
Gurgen Harutyunyan ◽  
Samvel Shoukourian ◽  
Valery Vardanian ◽  
Yervant Zorian
Keyword(s):  
Fault Detection ◽  
New Method ◽  
March Test ◽  
Test Algorithm ◽  
Algorithm Generation

scholarly journals Fault Detection with Optimum March Test Algorithm

2012 ◽  
Author(s):  
Nor Azura Zakaria ◽  
W.Z.W. Hasan ◽  
I.A. Halin ◽  
R.M. Sidek ◽  
Xiaoqing Wen
Keyword(s):  
Fault Detection ◽  
March Test ◽  
Test Algorithm
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