scholarly journals Digital System Design

2021 ◽  
Author(s):  
Janani Rajaraman
Keyword(s):  
System Design ◽  
Full Adder ◽  
Sequential Circuits ◽  
Digital System ◽  
Digital Systems ◽  
Combinational Circuits ◽  
Boolean Expression ◽  
Flip Flop ◽  
Half Adder ◽  
Digital System Design

The main objective of this chapter is to study and design various combinational circuits like Verification of Boolean Expression, Multiplexer, Demultiplexer Circuits, Code Converters circuits using LabVIEW tools. This chapter will make the user more comfortable towards learning of Design of Digital Systems. The various types of Boolean Expressions like SOP and POS, Combinational circuits like Adder circuit (Half adder and full adder), Subtractor circuit (Half Subtractor, Full Subtractor), some code converters like Binary to Gray and Gray to Binary, BCD to Gray and Gray to BCD and also Sequential circuits with D flip flop is also being carried out using this LabVIEW.

Fundamentals of Digital system Design using VHDL and DSCH3

2013 ◽  
Vol 1 (1) ◽  
pp. 16-21
Author(s):  
Ramachandran G ◽  
B. Rajasekaran ◽  
Karthika M.S ◽  
Kalaivani S ◽  
Suresh Kumar .G ◽  
...  
Keyword(s):  
System Design ◽  
Digital System ◽  
Digital System Design

Teaching digital system design with a minicomputer

1970 ◽  
Author(s):  
Marvin C. Woodfill
Keyword(s):  
System Design ◽  
Digital System ◽  
Digital System Design

Evolution of Fault Self-Repairing Circuit with High Reliability

2013 ◽  
Vol 462-463 ◽  
pp. 654-657
Author(s):  
Jian An Lou ◽  
Yang Li ◽  
Jian Hua Yu
Keyword(s):  
Evolutionary Algorithm ◽  
System Design ◽  
Continuous Improvement ◽  
High Reliability ◽  
Structure And Function ◽  
Digital System ◽  
Electronic Systems ◽  
Electromagnetic Environment ◽  
Digital System Design ◽  
And Function

With the continuous improvement of the complexity of the microelectronic system, its reliability risk is becoming more and more obvious. In order to improve the reliability of electronic systems in complex electromagnetic environment, this paper proposes a new fault self-repairing method; the idea is to realize controllable silicon evolution on the FPGA. A MicroBlaze CPU and VRC array are designed, and the CPU runs the evolutionary algorithm to configure the VRC array, dynamically changing the structure and function of the circuit, so as to obtain high reliability of the digital fault self-repairing circuit. Evolving fault self-repairing technology provides a new way for the high reliability of the digital system design.

High-Speed Digital System Design

2020 ◽  
Author(s):  
Anatoly Belous ◽  
Vitali Saladukha
Keyword(s):  
System Design ◽  
High Speed ◽  
Digital System ◽  
Digital System Design
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