scholarly journals Selective Harmonic Elimination for a Single-Phase 13-level TCHB Based Cascaded Multilevel Inverter Using FPGA

2014 ◽  
Vol 14 (3) ◽  
pp. 488-498 ◽  
Author(s):  
Wahidah Abd. Halim ◽  
Nasrudin Abd. Rahim ◽  
Maaspaliza Azri
2021 ◽  
Author(s):  
Baharuddin Ismail ◽  
Muzamir Isa ◽  
M. Z. Aikhsan ◽  
M. N. K. H. Rohani ◽  
C. L. Wooi ◽  
...  

Author(s):  
Taha Ahmed Hussein

<p>Selective harmonic elimination technique SHE is adopted in this work to reduce the harmonic contents in single phase cascaded multilevel inverter. The firing instants for the electronic switches MOSFETs in the inverter are calculated off line for five level to thirteen level inverter. An Arduino microcontroller is programmed to cope with different topologies of the multilevel inverter. The implemented multi-level (MLI) inverter results are compared with Simulink simulation program and are found very close to each other. SHE technique works at system frequency (50 Hz or 60 Hz) and the switching losses are very small. The sinusoidal pulse width modulation SPWM requires a carrier frequency not less 20 times the system frequency so SHE approach is found to be superior compared with SPWM. Also, SHE technique shows significant reduction in THD as the number of levels increased. Results for the output voltages and currents along with their frequency spectrum are shown and compared with traditional SPWM.</p>


Author(s):  
Wahidah Abd Halim ◽  
Tengku Noor Ariana Tengku Azam ◽  
Komathi Applasamy ◽  
Auzani Jidin

<span lang="EN-US">Multilevel inverters are emerging as the new breed of power converter options for high power applications. They typically synthesis the staircase voltage waveform (from several dc sources) which reduced harmonic content. This paper presents a simple selective harmonic elimination (SHE) modulation for single-phase cascaded H-bridge (CHB) multilevel inverter. The optimum switching angle of the transcendental equations describing the fundamental and harmonic components is solved by means of the Newton-Raphson (NR) method. The proposed SHE scheme is performed through simulation using MATLAB/Simulink. This simulation results are then verified through experiment using Altera DE0-Nano field-programmable gate array (FPGA). The proposed SHE is efficient in eliminating the lowest-order harmonics and producing a higher quality output waveform with a better harmonic profile.  </span>


The quality of power of the cascaded H-bridge multilevel inverter is affected due to harmonics. In this paper, a Selective Harmonic Elimination Pulse Width Modulation (SHE-PWM) method including controllable DC link voltage is introduced for the multilevel inverter. Novel mathematical modeling of SHE-PWM is established concerning the DC link voltage. Compared to ordinary selective harmonic elimination, the proposed method has an increased number of degrees of freedom because of its variable DC link voltage. On the other hand, the selective harmonic elimination utilizes constant DC link voltage. In the proposed scheme, the nonlinear equations are solved only once in the entire voltage range. As a result, the computational burden will decrease. Also, the Total Harmonic Distortion (THD) of the output voltage remains constant for various values of the operating points. The simulation is performed using Matlab Simulink and the comparison is performed with the conventional PWM method. It is intended that the proposed SHE-PWM based cascaded H-bridge multilevel inverter provides better performance in terms of lower-order harmonics and less THD compares to conventional PWM method.


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