Comparison of New Multilevel Inverter Topology with Conventional Topologies Used for Induction Heating System

In this article, a comparison of innovative multilevel inverter topology with standard topologies has been conducted. The proposed single phase five level inverter topology has been used for induction heating system. This suggested design generates five voltage levels with a fewer number of power switches. This reduction in number of switches decreases the switching losses and the number of driving circuits and reduce the complexity of control circuit. It also reduces the cost and size for the filter used. Analysis and comparison has been done among the conventional topologies (neutral clamped and cascade H-bridge multilevel inverters) with the proposed inverter topology. The analysis includes the total harmonic distortion THD, efficiency and overall performance of the inverter systems. The simulation and analysis have been done using MATLAB/ SIMULINK. The results show good performance for the proposed topology in comparison with the conventional topologies.

Aquila Optimization Based Harmonic Elimination in a Modified H-Bridge Inverter

Multilevel inverters (MLIs) are capable of producing high-quality output voltage and handling large amounts of power. This reduces the size of the filter while also simplifying the circuitry. As a result, they have a wide range of applications in industries, particularly in smart grids. The input voltage boosting feature is required to use the MLI with renewable energy. Moreover, many components are required to get higher output voltage levels that add weight and cost to the circuit. Numerous MLI topologies have been identified to minimize the losses, device count, and device ratings. A seven-level modified H-bridge inverter with a reduced component count, and reduced THD is presented in this paper. Two DC sources with six IGBTs have been used to generate a seven-level output voltage, and the Aquila Optimizer (AO) has been implemented to get the regulated output. MATLAB/Simulink environment has been used for designing the simulation model. Furthermore, the simulation result has been validated in the laboratory on a hardware setup using the DSP-TMS320F28335 Launchpad. With the reduced number of switching devices as well as the dc supply, the size of the inverter is compacted and becomes more economical.

A Dual Source Switched-Capacitor Multilevel Inverter with Reduced Device Count

Implementing voltage boost multilevel inverter topologies for PV and fuel cell energy sources is highly advantageous. Switched-capacitor multilevel inverters (SCMLI) have a step-up feature with low device requirements and can remove the need for high gain dc-dc converters leading to reduced overall system bulk. This work proposes a dual input SCMLI to achieve an output of nineteen levels while using a low number of components and high boosting factor and self-balancing of capacitor voltages. A comprehensive analysis of the proposed structure is presented, focusing on component requirements, cost and dynamic performance. The efficiency and loss distribution during operation is also provided. The operation and real-time performance of the SCMLI have been verified by simulation. Experimental results further validate the simulation results.

A Symbiotic Organism Search-Based Selective Harmonic Elimination in a Switched Capacitor Multilevel Inverter

Multilevel inverters are increasingly being employed for industrial applications, such as speed control of motors and grid integration of distributed generation systems. The focus is on developing topologies that utilize fewer lower-rating switches and power sources while working efficiently and reliably. This work pertains to developing a three-phase multilevel inverter that employs switching capacitors and a single DC power supply that produces a nine-stage, three-phase voltage output. A recently proposed powerful meta-heuristic technique called symbiotic organism search (SOS) has been applied to identify the optimum switching angles for Selective Harmonic Elimination (SHE) from the output voltage waveform. A thorough converter analysis has also been done in the MATLAB/SIMULINK environment and is validated with the real-time hardware-in-the-loop (HIL) experiment results.

A Robust Multilevel Inverter Topology for Operation under Fault Conditions

Multilevel inverters (MLIs) are used on a large scale because they have low total harmonic distortion (THD) and low voltage stress across the switches, making them ideal for medium- and high-power applications. The authenticity of semiconductor devices is one of the main concerns for these MLIs to operate properly. Due to the large number of switches in multilevel inverters, the possibility of a fault also arises. Hence, a reliable five-level inverter topology with fault-tolerant ability has been proposed. The proposed topology can withstand an open-circuit (OC) fault caused when any single switch fails. In comparison to typical multilevel inverters, the proposed topology is fault-tolerant and reliable. The simulation of the proposed topology is conducted in MATLAB-Simulink and PLECS software packages, and the results obtained for normal pre-fault, during-fault, and after-fault conditions are discussed. Experimental results also prove the proposed cell topology’s robustness and effectiveness in tolerating OC faults across the switches. Furthermore, a thorough comparison is provided to demonstrate the proposed topology’s superiority compared to recently published topologies with fault-tolerant features.

PRINCIPLES OF IMPROVEMENT OF MULTILEVEL AUTONOMOUS VOLTAGE INVERTERS

The article considers the properties of the most commonly used two-and multilevel inverter topologies used in systems for converting electricity from several primary power sources into the required high-quality output voltage for low-voltage networks and high-voltage consumers. However, a common disadvantage of most known multilevel converters is the increasing complexity of power structures, an increase in the number of primary power sources, power elements, and the cost of devices as the number of their voltage levels increases. Two schemes of alternative three-level autonomous voltage inverters with a high-frequency autotransformer with a midpoint and an example of constructing their digital control system are proposed. The analysis of their work on PSpice models in the OrCAD design system is carried out. The possibility of obtaining six voltage sublevels with fewer power elements and increased output voltage quality is shown, compared to the corresponding cascade multilevel inverters. The advantages and applications of autotransformer bridge voltage inverters in terms of energy and functionality compared to well-known multilevel inverters are presented. Ref. 8, fig. 7.

Design of new structure of multilevel inverter based on modified absolute sinusoidal PWM technique

The advantage of multilevel inverters is to produce high output voltage values with distortion as minimum as possible. To reduce total harmonic distortion (THD) and get an output voltage with different step levels using less power electronics switching devices, 15-level inverter is designed in this paper. Single-phase 11-switches with zero-level (ZL) and none-zero-level (NZL) inverter based on modified absolute sinusoidal pulse width modulation (MASPWM) technique is designed, modelled and built by MATLAB/Simulink. Simulation results explained that, multilevel inverter with NZL gives distortion percent less than that with ZL voltage. The THD of the inverter output voltage and current of ZL are 4% and 1%, while with NZL is 3.6% and 0.84%, respectively. These results explain the effectiveness of the suggested power circuit and MASPWM controller to get the required voltage with low THD.