A Prediction of Wafer Yield Using Product Fabrication Virtual Metrology Process Parameters in Semiconductor Manufacturing

Wan Sik Nam; Seoung Bum Kim

doi:10.7232/jkiie.2015.41.6.572

A Prediction of Wafer Yield Using Product Fabrication Virtual Metrology Process Parameters in Semiconductor Manufacturing

Journal of the Korean Institute of Industrial Engineers ◽

10.7232/jkiie.2015.41.6.572 ◽

2015 ◽

Vol 41 (6) ◽

pp. 572-578 ◽

Cited By ~ 1

Author(s):

Wan Sik Nam ◽

Seoung Bum Kim

Keyword(s):

Process Parameters ◽

Semiconductor Manufacturing ◽

Virtual Metrology

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10.1109/robot.2006.1641849 ◽

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Ming-Hsiung Hung ◽

Rung-Chuan Lin ◽

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Keyword(s):

Semiconductor Manufacturing ◽

Virtual Metrology

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Keyword(s):

Semiconductor Manufacturing ◽

Virtual Metrology

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Keyword(s):

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Semiconductor Manufacturing ◽

Manufacturing Control ◽

Virtual Metrology

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Author(s):

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Keyword(s):

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Virtual Metrology

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Virtual Metrology

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10.3182/20110828-6-it-1002.01339 ◽

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Keyword(s):

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