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On-chip Clock Distribution Using Transmission Line
Mapping Intimacies
◽
10.7567/ssdm.1999.e-15-2
◽
1999
◽
Author(s):
Masakazu Yamashina
◽
Masayuki Mizuno
Keyword(s):
Transmission Line
◽
Clock Distribution
◽
On Chip
Download Full-text
Related Documents
Cited By
References
A simple methodology for on-chip transmission line modeling and optimization for high-speed clock distribution
Japanese Journal of Applied Physics
◽
10.7567/1347-4065/ab02e0
◽
2019
◽
Vol 58
(SB)
◽
pp. SBBC06
Author(s):
Masahiro Ichihashi
◽
Haruichi Kanaya
Keyword(s):
Transmission Line
◽
High Speed
◽
Clock Distribution
◽
Modeling And Optimization
◽
Transmission Line Modeling
◽
On Chip
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A Simple Methodology of On-Chip Transmission Line Modeling for High Speed Clock Distribution
10.7567/ssdm.2018.ps-3-02
◽
2018
◽
Author(s):
M. Ichihashi
◽
H. Kanaya
Keyword(s):
Transmission Line
◽
High Speed
◽
Clock Distribution
◽
Transmission Line Modeling
◽
On Chip
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Broadband On-Chip Transmission Line Characterization Used in High-Speed and High-Frequency Communications
10.1109/rfit52905.2021.9565308
◽
2021
◽
Author(s):
Chien-Chang Huang
◽
Wen-Tsao Fu
◽
Kuan-Chien Cheng
Keyword(s):
Transmission Line
◽
High Frequency
◽
High Speed
◽
On Chip
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A 12-b 16-GS/s RF-Sampling Capacitive DAC for Multi-Band Soft Radio Base-Station Applications With On-Chip Transmission-Line Matching Network in 16-nm FinFET
IEEE Journal of Solid-State Circuits
◽
10.1109/jssc.2021.3109489
◽
2021
◽
pp. 1-1
Author(s):
Daniel Gruber
◽
Martin Clara
◽
Ramon Sanchez Perez
◽
Yu-Shan Wang
◽
Christoph Duller
◽
...
Keyword(s):
Transmission Line
◽
Base Station
◽
Matching Network
◽
Capacitive Dac
◽
On Chip
◽
Rf Sampling
◽
Multi Band
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A 25-Gbps 8-ps/mm transmission line based interconnect for on-chip communications in multi-core chips
2013 IEEE MTT-S International Microwave Symposium Digest (MTT)
◽
10.1109/mwsym.2013.6697762
◽
2013
◽
Cited By ~ 8
Author(s):
Jianyun Hu
◽
Jie Xu
◽
Michael Huang
◽
Hui Wu
Keyword(s):
Transmission Line
◽
On Chip
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Hybrid Simulation of Electromagnetic field of the On-Chip Clock Distribution Network
2019 12th International Workshop on the Electromagnetic Compatibility of Integrated Circuits (EMC Compo)
◽
10.1109/emccompo48512.2019.9097106
◽
2019
◽
Author(s):
Liu Hui-Min
◽
Su Tao
Keyword(s):
Electromagnetic Field
◽
Distribution Network
◽
Hybrid Simulation
◽
Clock Distribution
◽
Clock Distribution Network
◽
On Chip
Download Full-text
Prediction of delay time for future LSI using on-chip transmission line interconnects
Proceedings of the 2005 international workshop on System level interconnect prediction - SLIP '05
◽
10.1145/1053355.1053359
◽
2005
◽
Cited By ~ 2
Author(s):
Takumi Uezono
◽
Junpei Inoue
◽
Takanori Kyogoku
◽
Kenichi Okada
◽
Kazuya Masu
Keyword(s):
Transmission Line
◽
Delay Time
◽
On Chip
Download Full-text
On-chip liquid detector using synthesized transmission line on integrated passive device process
2016 IEEE International Symposium on Radio-Frequency Integration Technology (RFIT)
◽
10.1109/rfit.2016.7578143
◽
2016
◽
Author(s):
Hung Hsuan Chen
◽
Huy Nam Chu
◽
Tzyh-Ghuang Ma
Keyword(s):
Transmission Line
◽
Passive Device
◽
On Chip
Download Full-text
A multi-level transmission line network approach for multi-giga hertz clock distribution
Proceedings of the ASP-DAC 2005. Asia and South Pacific Design Automation Conference, 2005.
◽
10.1109/aspdac.2005.1466139
◽
2005
◽
Author(s):
Hongyu Chen
◽
Chung-Kuan Cheng
Keyword(s):
Transmission Line
◽
Clock Distribution
◽
Network Approach
◽
Multi Level
◽
Line Network
Download Full-text
A comparative study of three transmission line models for on-chip interconnects
2014 IEEE International Conference on Communiction Problem-solving
◽
10.1109/iccps.2014.7062286
◽
2014
◽
Author(s):
Zonghua Zheng
◽
Kun Ren
◽
Lingling Sun
◽
Jun Liu
Keyword(s):
Comparative Study
◽
Transmission Line
◽
On Chip
◽
Transmission Line Models
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