Spintronics-Based Nonvolatile Logic-in-Memory Architecture Towards an Ultra-Low-Power and Highly Reliable VLSI Computing Paradigm

Author(s):  
Takahiro Hanyu ◽  
Daisuke Suzuki ◽  
Naoya Onizawa ◽  
Shoun Matsunaga ◽  
Masanori Natsui ◽  
...  
2018 ◽  
Vol 67 (5) ◽  
pp. 631-645 ◽  
Author(s):  
Yu Bai ◽  
Ronald F. DeMara ◽  
Jia Di ◽  
Mingjie Lin

SPIN ◽  
2013 ◽  
Vol 03 (04) ◽  
pp. 1340014 ◽  
Author(s):  
TAKAHIRO HANYU

This paper presents an architecture-level approach, called nonvolatile logic-in-memory (NV-LIM) architecture, to solving performance-wall and power-wall problems in the present CMOS-only-based logic-LSI (Large-Scaled Integration) processors. The use of magnetic tunnel junction devices combined with a CMOS-gate style makes it possible to achieve a high-performance and ultra-low-power logic LSI. Some concrete examples using the proposed method allow you to achieve the desired performance improvement compared to a corresponding CMOS-only-based realization.


2022 ◽  
pp. 104449
Author(s):  
Bo Liu ◽  
Mingyue Liu ◽  
Yongliang Zhou ◽  
Xiaofeng Hong ◽  
Hao Cai ◽  
...  

2016 ◽  
Vol 136 (11) ◽  
pp. 1555-1566 ◽  
Author(s):  
Jun Fujiwara ◽  
Hiroshi Harada ◽  
Takuya Kawata ◽  
Kentaro Sakamoto ◽  
Sota Tsuchiya ◽  
...  

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