standard cmos process
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Electronics ◽  
2020 ◽  
Vol 9 (2) ◽  
pp. 372
Author(s):  
Minho Choi ◽  
Deog-Kyoon Jeong

A soft-switching hybrid DC-DC converter with a 2-phase switched capacitor is proposed for the implementation of a fully-integrated voltage regulator in a 65 nm standard CMOS process. The soft-switching operation is implemented to minimize power loss due to the parasitic capacitance of the flying capacitor. The 2-phase switched capacitor topology keeps the same resonance value for every soft-switching operation, resulting in minimizing the voltage imbalance of the flying capacitor. The proposed adaptive timing generator digitally calibrates the turn-on delay of switches to achieve a complete soft-switching operation. The simulation results show that the proposed soft-switching hybrid DC-DC converter with a 2-phase 2:1 switched capacitor improves the efficiency by 5.1% and achieves 79.5% peak efficiency at a maximum load current of 250 mA.


Author(s):  
Songting Li ◽  
Cong Li ◽  
Lei Cai ◽  
Yu Xiao ◽  
Zhipeng Luo ◽  
...  

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