Algorithm for real-time colour mixing of a five-channel LED system while optimising spectral quality parameters

Multichannel LED luminaires with more than three channels offer the advantage to vary the spectrum and keeping the chromaticity steady. However, the optimisation calculations of various quality metrics are a challenge for real-time implementation, especially for the limited resources of a luminaire’s microcontroller. Here, we present a method in which a five-channel system is simulated with a quickly solvable 3-channel system by defining virtual channels, each consisting of two LED channels. An analysis of the influence of the parameterisation of the virtual valences on various quality metrics is presented. It shows how these parameters must be set at the time of the mixing calculation, in order to optimise the desired quality aspect. The mixing calculation can thus be carried out in real-time without high hardware requirements and is suitable for further developments, for example, to compensate for colour drift of the LEDs through sensor feedback.

CIB-HIER

Hierarchical organization is widely used in high-radix routers to enable efficient scaling to higher switch port count. A general-purpose hierarchical router must be symmetrically designed with the same input buffer depth, resulting in a large amount of unused input buffers due to the different link lengths. Sharing input buffers between different input ports can improve buffer utilization, but the implementation overhead also increases with the number of shared ports. Previous work allowed input buffers to be shared among all router ports, which maximizes the buffer utilization but also introduces higher implementation complexity. Moreover, such design can impair performance when faced with long packets, due to the head-of-line blocking in intermediate buffers. In this work, we explain that sharing unused buffers between a subset of router ports is a more efficient design. Based on this observation, we propose Centralized Input Buffer Design in Hierarchical High-radix Routers (CIB-HIER), a novel centralized input buffer design for hierarchical high-radix routers. CIB-HIER integrates multiple input ports onto a single tile and organizes all unused input buffers in the tile as a centralized input buffer. CIB-HIER only allows the centralized input buffer to be shared between ports on the same tile, without introducing additional intermediate virtual channels or global scheduling circuits. Going beyond the basic design of CIB-HIER, the centralized input buffer can be used to relieve the head-of-line blocking caused by shallow intermediate buffers, by stashing long packets in the centralized input buffer. Experimental results show that CIB-HIER is highly effective and can significantly increase the throughput of high-radix routers.

How Does Employee Infusion Use of CRM Systems Drive Customer Satisfaction? Mechanism Differences Between Face-to-Face and Virtual Channels

To attain customer satisfaction, service firms invest significant resources to implement customer relationship management (CRM) systems to support internal customer service (CS) employees who provide service to external customers in both face-to-face and virtual channels. How CS employees apply sophisticated CRM systems to interact with customers and how the mechanisms through which their CRM usage affects customer satisfaction vary across service channels and bear important implications. We approach these issues by investigating the concept of infusion use, defined as CS employees’ assessment of the extent to which they use a CRM system to its fullest potential to best support their work in the CRM-enabled service interaction context. Drawing on the IS success framework and expectation confirmation theory, we first formulate a baseline model that explains the direct and indirect mechanisms through which CS employees’ infusion use of CRM systems leads to customers’ expectation confirmation, which in turn affects customers’ satisfaction. We then draw on the lenses of media richness and communication adaptation to theorize why these two mechanisms exert differential influence in face-to-face and virtual channels. We test the hypotheses by collecting multiwave data from CS employees, customers, and firm archives of a Fortune 500 telecom service firm. We find that (1) CS employee infusion use can directly contribute to customer expectation confirmation and indirectly do so through CS employees’ satisfaction with the system (i.e., user satisfaction), and (2) the direct mechanism plays a more critical role in the face-to-face channel, whereas the indirect mechanism is more important in the virtual channel. Our findings inform managers of the avenues through which employees’ infusion use promotes CRM-enabled service success across face-to-face and virtual service channels.

Management of Load-Balancing Data Stream in Interposer-Based Network-on-Chip Using Specific Virtual Channels

The interaction between cores and memory blocks, in multiprocessor chips and smart systems, has always been a concern as it affects network latency, memory capacity, and power consumption. A new 2.5-dimensional architecture has been introduced in which the communication between the processing elements and the memory blocks is provided through a layer called the interposer. If the core wants to connect to another, it uses the top layer, and if it wants to interact with the memory blocks, it uses the interposer layer. In a case that coherence traffic at the processing layer increases to the extent that congestion occurs, a part of this traffic may be transferred to the interposer network under a mechanism called load balancing. When coherence traffic is moved to the interposer layer, as an alternative way, this may interfere with memory traffic. This paper introduces a mechanism in which the aforementioned interference may be avoided by defining two different virtual channels and using multiple links which specifically determines which memory block is going to be accessed. Our method is based on the destination address to recognize which channel and link should be selected while using the interposer layer. The simulation results show that the proposed mechanism has improved by 32% and 14% latency compared to the traditional load-balancing and unbalanced mechanisms, respectively.

Stable Matching based Virtual Channels Allocation Scheme in Network-on-Chip

While designing router micro-architecture of an On-Chip network, a good allocation of virtual channels (VCs) governs an effective resources utilization which essentially results in an optimized number of packets received at destination(s). Generally, the VC allocation schemes deal with the one-way approach of VC allocation to the contending flits. However, this approach produces non-optimal matching of flits to the available VCs on next routers, and therefore leads to the under-utilization of these VCs. This paper proposes a 2-Way VC Allocation scheme to map input VCs (requestors) to output VCs (resources). The proposed scheme is compared with the conventional VC allocation scheme under two different mesh configurations with a 100% channel load. Simulations performed under two different routing schemes in diverse traffic scenarios demonstrate an increase in the number of packets received at destinations by up to 76%. Also, the network’s latency exhibits trade-off with total power consumption while reducing hotspots.