MATHEMATICAL MODELS PRODUCTIVITY OF CLUSTER SYSTEM BASED ON RASPBERRY PI 3B+

Context. High-performance computing systems are needed to solve many scientific problems and to work with complex applied problems. Previously, real parallel data processing was supported only by supercomputers, which are very limited and difficult to access. Currently, one way to solve this problem is to build small, cheap clusters based on single-board computers Raspberry Pi. Objective. The goal of the work is the creation of a complex criterion for the efficiency of the cluster system, which could properly characterize the operation of such a system and find the dependences of the performance of the cluster system based on Raspberry Pi 3B+ on the number of boards in it with different cooling systems. Method. It is offered to apply in the analysis of small cluster computer systems the complex criterion of efficiency of work of cluster system which will consider the general productivity of cluster computer system, productivity of one computing element in cluster computer system, electricity consumption by cluster system, electricity consumption per one computing element, the cost of calculating 1 Gflops cluster computer system, the total cost of the cluster computer system. Results. The developed complex criterion of cluster system efficiency was used to create an experimental cluster system based on single-board computers Raspberry Pi 3B+. Mathematical models of the dependence of the performance of a small cluster system based on single-board computers Raspberry Pi 3B+ depending on the number of boards in it with different cooling systems have also been developed. Conclusions. The conducted experiments confirmed the expediency of using the developed complex criterion of efficiency of the cluster system and allow to recommend it for use in practice when creating small cluster systems. Prospects for further research are to determine the weights of the constituent elements of the complex criterion of efficiency of the cluster system, as well as in the experimental study of the proposed weights.

Improved Ternary Reversible Logic Synthesis Using Group Theoretic Approach

Quantum computation relies on exploiting quantum mechanical phenomena, and has received significant attention in recent years. Higher-dimensional quantum systems increase the density of encoded information per computing element (e.g., qutrit for three-level system), resulting in less resource overhead. For instance, 63% reduction in the number of qutrits is possible for ternary quantum systems as compared to the corresponding binary systems. The proposed work exploits this fact to synthesize ternary reversible circuits employing a cycle-based technique. The method starts from the ternary reversible specification of a given function in the form of a permutation. The permutation cycles are factored into simpler three-cycles and two-cycles, which are then mapped to ternary reversible gates. Different gate libraries are used to synthesize three-cycles and two-cycles, respectively. A gate decomposition approach is also proposed to synthesize a quantum gate netlist in terms of elementary ternary quantum gates, viz. Muthukrishnan–Stroud gate and shift gate. Synthesis results on benchmark functions indicate that the proposed method results in 27% and 6% improvements in quantum cost and gate count, respectively, over existing works in the literature.

Emulation and Analytical Model of PIM Supplemental Computing Element via HDL

This article presents and describes the simulation and emulation of single processing core, designed for new heterogeneous multiprocessor computer architectures with supplemental computing elements in the operating memory. We study the emulated results over the simulated model to confirm it’s usability in the overall simulation of complete system. The simulated models are developed based on existing data, comparing time markers, measuring the output performance against the results from the emulation. Using additional computing elements in the memory will allows us to improve the current limitations of the conventional architectures.