A novel enhanced quantum image representation based on bit-planes for log-polar coordinates

Quantum image representation has a significant impact in quantum image processing. In this paper, a bit-plane representation for log-polar quantum images (BRLQI) is proposed, which utilizes $(n+4)$ or $(n+6)$ qubits to store and process a grayscale or RGB color image of $2^n$ pixels. Compared to a quantum log-polar image (QUALPI), the storage capacity of BRLQI improves 16 times. Moreover, several quantum operations based on BRLQI are proposed, including color information complement operation, bit-planes reversing operation, bit-planes translation operation and conditional exchange operations between bit-planes. Combining the above operations, we designed an image scrambling circuit suitable for the BRLQI model. Furthermore, comparison results of the scrambling circuits indicate that those operations based on BRLQI have a lower quantum cost than QUALPI. In addition, simulation experiments illustrate that the proposed scrambling algorithm is effective and efficient.

Efficient Designs of Quantum Adder/Subtractor Using Universal Reversible Gate on IBM Q

Reversible arithmetic and logic unit (ALU) is a necessary part of quantum computing. In this work, we present improved designs of reversible half and full addition and subtraction circuits. The proposed designs are based on a universal one type gate (G gate library). The G gate library can generate all possible permutations of the symmetric group. The presented designs are multi-function circuits that are capable of performing additional logical operations. We achieve a reduction in the quantum cost, gate count, number of constant inputs, and delay with zero garbage, compared to relevant results obtained by others. The experimental results using IBM Quantum Experience (IBM Q) illustrate the success probability of the proposed designs.

Reversible Gate Logic Adder with Parity Preserving Design

Reversible logic circuits have drawn attention from a variety of fields, including nanotechnology, optical computing, quantum computing, and low-power CMOS design. Low-power and high-speed adder cells (like the BCD adder) are used in binary operation-based electronics. The most fundamental digital circuit activity is binary addition. It serves as a foundation for all subsequent mathematical operations. The main challenge today is to reduce the power consumption of adder circuits while maintaining excellent performance over a wide range of circuit layouts. Error detection in digital systems is aided by parity preservation. This article proposes a concept for a fault-tolerant parity- preserving BCD adder. To reduce power consumption and circuit quantum cost, the proposed method makes use of reversible logic gates like IG, FRG, and F2G. Comparing the proposed circuit to the current counterpart, it has fewer constant inputs and garbage outputting devices and is faster.

Comparative Review on Efficient Design of Reversible Sequential Circuits based on Optimization Parameters

Reversible computing, a well known research area in the field of computer science. One of the aims of reversible computing is to design low power digital circuits that dissipates no energy to heat. The main challenge of designing reversible circuits is to optimize the parameters which make the design costly. In this paper, we review different designs of efficient reversible sequential circuits and prepare a comparative statement based on eight optimization parameters such as Quantum Cost (QC), Delay (del), Garbage Output (GO), Constant Input (CI), Gate Level (GL), Number of Gate (NoG), Type of Gate (ToG), Hardware Complexity (HC) of Circuit.

Synthesis Strategy of Reversible Circuits on DNA Computers

DNA computers and quantum computers are gaining attention as alternatives to classical digital computers. DNA is a biological material that can be reprogrammed to perform computing functions. Quantum computing performs reversible computations by nature based on the laws of quantum mechanics. In this paper, DNA computing and reversible computing are combined to propose novel theoretical methods to implement reversible gates and circuits in DNA computers based on strand displacement reactions, since the advantages of reversible logic gates can be exploited to improve the capabilities and functionalities of DNA computers. This paper also proposes a novel universal reversible gate library (URGL) for synthesizing n-bit reversible circuits using DNA to reduce the average length and cost of the constructed circuits when compared with previous methods. Each n-bit URGL contains building blocks to generate all possible permutations of a symmetric group of degree n. Our proposed group (URGL) in the paper is a permutation group. The proposed implementation methods will improve the efficiency of DNA computer computations as the results of DNA implementations are better in terms of quantum cost, DNA cost, and circuit length.

A Review on Reversible Computing and it’s applications on combinational circuits

In this era of nanometer semiconductor nodes, the transistor scaling and voltage scaling are not any longer in line with each other, leading to the failure of the Dennard scaling. Thus, it poses a severe design challenge. Reversible computing plays a vital role in applications like low power CMOS, nanotechnology, quantum computing, optical computing, digital signal processing, cryptography, computer graphics andmany more. The primary reasons for designing reversible logic are diminishing the quantum cost, profundity of the circuits and the garbage outputs. It is impossible to determine the quantum computing without implementing the reversible computation. This paper will represent the literature survey based on several papers on combinational circuits using reversible computing and also the future scope is to be discussed.

Optimization of Reversible Circuits Using Toffoli Decompositions with Negative Controls

The synthesis and optimization of quantum circuits are essential for the construction of quantum computers. This paper proposes two methods to reduce the quantum cost of 3-bit reversible circuits. The first method utilizes basic building blocks of gate pairs using different Toffoli decompositions. These gate pairs are used to reconstruct the quantum circuits where further optimization rules will be applied to synthesize the optimized circuit. The second method suggests using a new universal library, which provides better quantum cost when compared with previous work in both cost015 and cost115 metrics; this proposed new universal library “Negative NCT” uses gates that operate on the target qubit only when the control qubit’s state is zero. A combination of the proposed basic building blocks of pairs of gates and the proposed Negative NCT library is used in this work for synthesis and optimization, where the Negative NCT library showed better quantum cost after optimization compared with the NCT library despite having the same circuit size. The reversible circuits over three bits form a permutation group of size 40,320 (23!), which is a subset of the symmetric group, where the NCT library is considered as the generators of the permutation group.