1996 Symposium on VLSI Circuits. Digest of Technical Papers
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Published By Widerkehr & Associates

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Skew minimization techniques for 256M-bit synchronous DRAM and beyond

1996 Symposium on VLSI Circuits. Digest of Technical Papers ◽

10.1109/vlsic.1996.507767 ◽

2005 ◽

Cited By ~ 1

Author(s):

Jin-Man Han ◽

Jung-Bae Lee ◽

Sei-Seung Yoon ◽

Se-Jin Jeong ◽

Churoo Park ◽

...

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A mixed-signal RAM decision-feedback equalizer for disk drives

1996 Symposium on VLSI Circuits. Digest of Technical Papers ◽

10.1109/vlsic.1996.507762 ◽

2002 ◽

Cited By ~ 2

Author(s):

B.C. Rothenberg ◽

J.E.C. Brown ◽

P.J. Hurst ◽

S.H. Lewis

Keyword(s):

Decision Feedback ◽

Decision Feedback Equalizer ◽

Disk Drives ◽

Mixed Signal

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New TSPC latches and flipflops minimizing delay and power

1996 Symposium on VLSI Circuits. Digest of Technical Papers ◽

10.1109/vlsic.1996.507754 ◽

2002 ◽

Cited By ~ 3

Author(s):

Jiren Yuan ◽

C. Svensson

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Capacitance coupled bus with negative delay circuit for high speed and low power (10 GB/s>500 mW) synchronous DRAMs

1996 Symposium on VLSI Circuits. Digest of Technical Papers ◽

10.1109/vlsic.1996.507735 ◽

2002 ◽

Cited By ~ 1

Author(s):

T. Yamada ◽

T. Suzuki ◽

M. Agata ◽

A. Fujiwara ◽

T. Fujita

Keyword(s):

Low Power ◽

High Speed ◽

Delay Circuit ◽

Negative Delay

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A CMOS channel-select filter for a direct-conversion wireless receiver

1996 Symposium on VLSI Circuits. Digest of Technical Papers ◽

10.1109/vlsic.1996.507717 ◽

2002 ◽

Cited By ~ 13

Author(s):

P.J. Chang ◽

A. Rofougaran ◽

A.A. Abidi

Keyword(s):

Direct Conversion ◽

Wireless Receiver

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A modular architecture for a 6.4-Gbyte/s, 8-Mbit media chip

1996 Symposium on VLSI Circuits. Digest of Technical Papers ◽

10.1109/vlsic.1996.507709 ◽

2002 ◽

Cited By ~ 10

Author(s):

T. Watanabe ◽

R. Fujita ◽

K. Yanagisawa ◽

H. Tanaka ◽

K. Ayukawa ◽

...

Keyword(s):

Modular Architecture

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Negative heap pump for low voltage operation flash memory

1996 Symposium on VLSI Circuits. Digest of Technical Papers ◽

10.1109/vlsic.1996.507723 ◽

2002 ◽

Cited By ~ 27

Author(s):

M. Mihara ◽

Y. Terada ◽

M. Yamada

Keyword(s):

Flash Memory ◽

Low Voltage ◽

Low Voltage Operation

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A 3 V video signal processing LSI using only bipolar technology

1996 Symposium on VLSI Circuits. Digest of Technical Papers ◽

10.1109/vlsic.1996.507763 ◽

2002 ◽

Author(s):

H. Hirose ◽

F. Yamaguchi ◽

K. Sato ◽

T. Ikeda ◽

J. Nakamura ◽

...

Keyword(s):

Signal Processing ◽

Video Signal ◽

Video Signal Processing ◽

Bipolar Technology

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Future of the multimedia home PC

1996 Symposium on VLSI Circuits. Digest of Technical Papers ◽

10.1109/vlsic.1996.507724 ◽

2002 ◽

Cited By ~ 1

Author(s):

W. Patterson

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A data recovery circuit for burst signal using 440 MHz CMOS direct phase controlled VCO

1996 Symposium on VLSI Circuits. Digest of Technical Papers ◽

10.1109/vlsic.1996.507738 ◽

2002 ◽

Author(s):

A. Yoshida ◽

T. Taya ◽

N. Yamaoka ◽

S. Matsumoto ◽

T. Yokoyama

Keyword(s):

Data Recovery

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1996 Symposium on VLSI Circuits. Digest of Technical PapersLatest Publications

TOTAL DOCUMENTS

H-INDEX

Published By Widerkehr & Associates

Skew minimization techniques for 256M-bit synchronous DRAM and beyond

A mixed-signal RAM decision-feedback equalizer for disk drives

New TSPC latches and flipflops minimizing delay and power

Capacitance coupled bus with negative delay circuit for high speed and low power (10 GB/s>500 mW) synchronous DRAMs

A CMOS channel-select filter for a direct-conversion wireless receiver

A modular architecture for a 6.4-Gbyte/s, 8-Mbit media chip

Negative heap pump for low voltage operation flash memory

A 3 V video signal processing LSI using only bipolar technology

Future of the multimedia home PC

A data recovery circuit for burst signal using 440 MHz CMOS direct phase controlled VCO

1996 Symposium on VLSI Circuits. Digest of Technical Papers
Latest Publications