1996 Symposium on VLSI Circuits. Digest of Technical Papers
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A modular architecture for a 6.4-Gbyte/s, 8-Mbit media chip

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A microcontroller embedded with 4 Kbit ferroelectric non-volatile memory

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A dual layer bitline DRAM array with Vcc/Vss hybrid precharge for multi-gigabit DRAMs

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