A Review of Sharp-Switching Band-Modulation Devices

This paper reviews the recently-developed class of band-modulation devices, born from the recent progress in fully-depleted silicon-on-insulator (FD-SOI) and other ultrathin-body technologies, which have enabled the concept of gate-controlled electrostatic doping. In a lateral PIN diode, two additional gates can construct a reconfigurable PNPN structure with unrivalled sharp-switching capability. We describe the implementation, operation, and various applications of these band-modulation devices. Physical and compact models are presented to explain the output and transfer characteristics in both steady-state and transient modes. Not only can band-modulation devices be used for quasi-vertical current switching, but they also show promise for compact capacitorless memories, electrostatic discharge (ESD) protection, sensing, and reconfigurable circuits, while retaining full compatibility with modern silicon processing and standard room-temperature low-voltage operation.

Design of Low Voltage Low Power High Gain Operational Transconductance Amplifier

In this paper, a high gain structure of operational transconductance amplifier is presented. For low voltage operation with improved frequency response bulk driven quasi-floating gate MOSFET is used at the input. Further for achieving high gain the modified self cascode structure is used at the output. Compared to conventional self cascode the modified self cascode structure used provides higher transconductance which helps in significant boosting of gain of the amplifier. The modification is achieved by employing quasi-floating gate transistor which helps in scaling of the threshold which as a result increases the drain-to-source voltage of linear mode transistor thus changing it to saturation. This change of mode boosts the effective transconductance of self cascode MOSFET. The proposed operational transconductance amplifier when compared to its conventional showed improvement in DC gain by 30dB and also the unity gain bandwidth increases by 6 fold. The MOS models used for amplifier design are of 0.18µm CMOS technology at supply of 0.5V.

A Sub-1 V Bulk-Driven Rail to Rail Dynamic Voltage Comparator with Enhanced Transconductance

Reduced voltage head room availability for input signal swing is one of the major bottlenecks in the design of circuits operating with low supply voltages which attracts investigations leading to improvement in the input signal dynamic range of such circuits. Employing bulk-driven MOSFETs (BDMOS) at the input section of the circuit is a popular technique used for increasing the input dynamic range, but the smaller bulk transconductance of the bulk-driven MOSFET degrades the performance of the circuit in comparison with that of a conventional gate-driven counterpart. A double tail voltage comparator employing BDMOS technique offering rail-to-rail input dynamic range and capable of operating at sub-1[Formula: see text]V power supply is presented in this paper. A transconductance improvement scheme is employed for the first time in the literature for a voltage comparator to overcome the major drawbacks associated with the reduced bulk transconductance of BDMOS input transistors and double tail topology permits low voltage operation. The performance parameters of the proposed voltage comparator are comparable to that of conventional gate-driven comparators, with an additional advantage of rail-to-rail input dynamic range. Pre-layout and post-layout simulations were performed in Cadence Virtuoso suite with gpdk 90[Formula: see text]nm library at power supply as low as 0.6[Formula: see text]V. The worst case delay of the proposed circuit is 0.71[Formula: see text]ns and the worst case power consumption of the circuit is 15[Formula: see text]uW. The circuit consumes a silicon area of 33[Formula: see text]μm[Formula: see text]46[Formula: see text]μm. An analytical model of the transconductance enhancement technique and delay of the proposed comparator are also presented.

A Fully-Integrated 180 nm CMOS 1.2 V Low-Dropout Regulator for Low-Power Portable Applications

This paper presents the design and postlayout simulation results of a capacitor-less low dropout (LDO) regulator fully integrated in a low-cost standard 180 nm Complementary Metal-Oxide-Semiconductor (CMOS) technology which regulates the output voltage at 1.2 V from a 3.3 to 1.3 V battery over a –40 to 120°C temperature range. To meet with the constraints of system-on-chip (SoC) battery-operated devices, ultralow power (Iq = 8.6 µA) and minimum area consumption (0.109 mm2) are maintained, including a reference voltage Vref = 0.4 V. It uses a high-gain dynamically biased folded-based error amplifier topology optimized for low-voltage operation that achieves an enhanced regulation-fast transient performance trade-off.

High Power Very Low Voltage Electric Motor for Electric Vehicle

Electric vehicles are often designed in the same way as their conventional counterparts based on the internal combustion engine, they are heavy machines for comfort and safety reasons, and increasingly powerful. Under these conditions, in order to simplify the motor electrical supply system by reducing the current levels, the voltage chosen for the battery is very high and can go up to 700 V. However, for many applications where the power is relatively low (< 30 kW per motor), it can be more beneficial to size the system at very low voltage (< 60 V). This approach allows to overcome many constraining safety requirements and also to use off-the-shelf components (motor controllers, connectors, etc.) that are more easily available on the market in this voltage range. There are also many regulatory provisions that may require to stay within this voltage limit. This article presents a variety of very low voltage motorisation solutions with a required power up to 100kW. They use two complementary approaches. The first is to implement an original permanent magnet synchronous machine technology with an optimised armature winding for low voltage operation. The second is based on power splitting where the electrical machine being designed to be driven by multiple controllers. Many examples of low-voltage motorised vehicles (sporty vehicle, tractor, re-motorised automobile, etc.) are illustrated in this article.

Adaptive Spiking Sensor System Based on CMOS Memristors Emulating Long and Short-Term Plasticity of Biological Synapses for Industry 4.0 Applications

A conventional analog to digital converter (ADC) faces many issues with leading-edge technologies due to noise, manufacturing deviations, signal swings, etc. Thus, we pursue to design an adaptive spiking neural ADC (SN-ADC) with promising features, e.g., robust to noise, low-power, technology scaling issues, and low-voltage operation. Therefore, our approach promises to be technology agnostic, i.e., effectively translatable to aggressive new technologies. It supports machine learning and self-x (self-calibration, self-healing) that needs for industry 4.0 and the internet of things (IoTs). In this work, we design an adaptive spike-to-rank coding (ASRC), which is the main part of the spiking neural ADC. The ASRC is based on CMOS memristors emulating short-term plasticity (STP) and long-term plasticity (LTP) biological synapses. The proposed ASRC compensates deviations by adapting the weights of the synapses. Also, ASRC is designed using XFAB 0.35 μm CMOS technology and Cadence design tools. In addition, ASRC is simulated to test its performance in the temperature range (−40°C to 85°C).

Fabrication of Metal Nanowire Based Stretchable Mesh Electrode for Wearable Heater Application

In recent years, human-convenient smart wearable devices have attracted considerable attention as emerging applications in smart healthcare systems, soft robotics, and human-machine interfaces. In particular, resistive film heaters with mechanical flexibility and excellent mechanical and electrothermal performance have recently been widely explored for wearable thermotherapy applications. Here, we present a simple and efficient way of fabricating highly flexible and stretchable resistive film heaters based on a patterned silver nanowire (AgNW)/polymer composite structure. The AgNW/polymer composite electrodes were successfully prepared using a photolithographically patterned polymer mold based selective transfer of a AgNW percolation network. The photolithographic mold patterning process allows the heater fabrication to be precise and reproducible. The mesh-patterned AgNW/polymer composite heater exhibited the excellent electrothermal performance of ~46.7 oC at 3 V. This low-voltage operation is highly desirable in practical wearable device applications. Moreover, the AgNW/polymer heater can be stretched up to 20% without significant degradation in electrothermal performance thanks to its open-cell architecture, suggesting that the device can stably transfer heat to the skin after being attached to various body parts with curvilinear surfaces. The experimental results suggest that the mesh-structured AgNW/polymer composite heaters are highly feasible for use as a wearable thermotherapy tool in many emerging applications.