International Test Conference 1988 Proceeding@m_New Frontiers in Testing
Latest Publications

TOTAL DOCUMENTS

134

(FIVE YEARS 0)

H-INDEX

(FIVE YEARS 0)

Published By IEEE Comput. Soc. Press

0818608706

Latest Documents Most Cited Documents Contributed Authors Related Sources Related Keywords

Continuous signature monitoring: efficient concurrent-detection of processor control errors

International Test Conference 1988 Proceeding@m_New Frontiers in Testing ◽

10.1109/test.1988.207880 ◽

2003 ◽

Cited By ~ 25

Author(s):

K. Wilken ◽

J.P. Shen

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Designs for diagnosability and reliability in VLSI systems

International Test Conference 1988 Proceeding@m_New Frontiers in Testing ◽

10.1109/test.1988.207877 ◽

2003 ◽

Cited By ~ 6

Author(s):

S.Y.H. Su ◽

H. Ma

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Determination of safe back-driving currents in bond wires and dice

International Test Conference 1988 Proceeding@m_New Frontiers in Testing ◽

10.1109/test.1988.207897 ◽

2003 ◽

Author(s):

G.J. Hill ◽

B.C. Roberts ◽

C.P. Strudwick

Keyword(s):

Bond Wires

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Do the designs work? (VLSI design education)

International Test Conference 1988 Proceeding@m_New Frontiers in Testing ◽

10.1109/test.1988.207804 ◽

2003 ◽

Cited By ~ 2

Author(s):

K. Rose

Keyword(s):

Design Education ◽

Vlsi Design

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Testability features of a 32 kbps ADPCM transcoder

International Test Conference 1988 Proceeding@m_New Frontiers in Testing ◽

10.1109/test.1988.207794 ◽

2003 ◽

Cited By ~ 1

Author(s):

L.A. Bonet

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WTPGA: a novel weighted test-pattern generation approach for VLSI built-in self test

International Test Conference 1988 Proceeding@m_New Frontiers in Testing ◽

10.1109/test.1988.207810 ◽

2003 ◽

Cited By ~ 20

Author(s):

F. Siavoshi

Keyword(s):

Test Pattern ◽

Pattern Generation ◽

Test Pattern Generation ◽

Self Test ◽

Built In Self Test

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Design for test and the cost of quality

International Test Conference 1988 Proceeding@m_New Frontiers in Testing ◽

10.1109/test.1988.207815 ◽

2003 ◽

Cited By ~ 3

Author(s):

C. Salzmann ◽

M. Funcell ◽

R. Taylor

Keyword(s):

Design For Test ◽

Cost Of Quality ◽

The Cost

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Test scheduling for high performance VLSI system implementations

International Test Conference 1988 Proceeding@m_New Frontiers in Testing ◽

10.1109/test.1988.207829 ◽

2003 ◽

Cited By ~ 10

Author(s):

J. Sayah ◽

C.R. Kime

Keyword(s):

High Performance ◽

Test Scheduling ◽

Vlsi System

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Circular BIST with partial scan

International Test Conference 1988 Proceeding@m_New Frontiers in Testing ◽

10.1109/test.1988.207857 ◽

2003 ◽

Cited By ~ 44

Author(s):

M.M. Pradhan ◽

E.J. O'Brien ◽

S.L. Lam ◽

J. Beausang

Keyword(s):

Partial Scan

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PGTOOL: an automatic interactive program generation tool for testing new-generation memory devices

International Test Conference 1988 Proceeding@m_New Frontiers in Testing ◽

10.1109/test.1988.207837 ◽

2003 ◽

Cited By ~ 3

Author(s):

Y. Kawabata ◽

M. Maruyama ◽

A. Tejeda

Keyword(s):

Memory Devices ◽

Interactive Program ◽

Program Generation ◽

New Generation

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International Test Conference 1988 Proceeding@m_New Frontiers in TestingLatest Publications

TOTAL DOCUMENTS

H-INDEX

Published By IEEE Comput. Soc. Press

Continuous signature monitoring: efficient concurrent-detection of processor control errors

Designs for diagnosability and reliability in VLSI systems

Determination of safe back-driving currents in bond wires and dice

Do the designs work? (VLSI design education)

Testability features of a 32 kbps ADPCM transcoder

WTPGA: a novel weighted test-pattern generation approach for VLSI built-in self test

Design for test and the cost of quality

Test scheduling for high performance VLSI system implementations

Circular BIST with partial scan

PGTOOL: an automatic interactive program generation tool for testing new-generation memory devices

International Test Conference 1988 Proceeding@m_New Frontiers in Testing
Latest Publications