9th International Symposium on Quality Electronic Design (isqed 2008)
Latest Publications

TOTAL DOCUMENTS

183

(FIVE YEARS 0)

H-INDEX

(FIVE YEARS 0)

Published By IEEE

9780769531175

Latest Documents Most Cited Documents Contributed Authors Related Sources Related Keywords

A Statistical Characterization of CMOS Process Fluctuations in Subthreshold Current Mirrors

9th International Symposium on Quality Electronic Design (isqed 2008) ◽

10.1109/isqed.2008.4479717 ◽

2008 ◽

Cited By ~ 1

Author(s):

Lei Zhang ◽

Zhiping Yu ◽

Xiangqing He

Keyword(s):

Cmos Process ◽

Statistical Characterization ◽

Subthreshold Current ◽

Current Mirrors

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Thermal Aware Global Routing of VLSI Chips for Enhanced Reliability

9th International Symposium on Quality Electronic Design (isqed 2008) ◽

10.1109/isqed.2008.4479779 ◽

2008 ◽

Cited By ~ 9

Author(s):

Aseem Gupta ◽

Nikil D. Dutt ◽

Fadi J. Kurdahi ◽

Kamal S. Khouri ◽

Magdy S. Abadir

Keyword(s):

Global Routing ◽

Vlsi Chips

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Tutorial 1: The Promise of High-k/Metal Gates-From Electronic Transport Phenomena to Emerging Device/Circuit Applications

9th International Symposium on Quality Electronic Design (isqed 2008) ◽

10.1109/isqed.2008.4479684 ◽

2008 ◽

Author(s):

K. Maitra

Keyword(s):

Electronic Transport ◽

Transport Phenomena ◽

Metal Gates ◽

High K

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Accelerating Clock Mesh Simulation Using Matrix-Level Macromodels and Dynamic Time Step Rounding

9th International Symposium on Quality Electronic Design (isqed 2008) ◽

10.1109/isqed.2008.4479810 ◽

2008 ◽

Cited By ~ 6

Author(s):

Xiaoji Ye ◽

Min Zhao ◽

Rajendran Panda ◽

Peng Li ◽

Jiang Hu

Keyword(s):

Time Step ◽

Dynamic Time

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A Built-in Test and Characterization Method for Circuit Marginality Related Failures

9th International Symposium on Quality Electronic Design (isqed 2008) ◽

10.1109/isqed.2008.4479847 ◽

2008 ◽

Cited By ~ 1

Author(s):

Alodeep Sanyal ◽

Sandip Kundu

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Tutorial 5: Caches in the Many-Core Era: What Purpose Might eDRAM Serve?

9th International Symposium on Quality Electronic Design (isqed 2008) ◽

10.1109/isqed.2008.4479688 ◽

2008 ◽

Author(s):

Hillary Hunter

Keyword(s):

The Many ◽

Many Core

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Interconnect Signaling and Layout Optimization to Manage Thermal Effects Due to Self Heating in On-Chip Signal Buses

9th International Symposium on Quality Electronic Design (isqed 2008) ◽

10.1109/isqed.2008.4479710 ◽

2008 ◽

Cited By ~ 1

Author(s):

Krishnan Sundaresan ◽

Nihar R. Mahapatra

Keyword(s):

Thermal Effects ◽

Layout Optimization ◽

Self Heating ◽

On Chip ◽

Chip Signal

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Embedded Deterministic Test Exploiting Care Bit Clustering and Seed Borrowing

9th International Symposium on Quality Electronic Design (isqed 2008) ◽

10.1109/isqed.2008.4479846 ◽

2008 ◽

Author(s):

Adam B. Kinsman ◽

Nicola Nicolici

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A Knowledge-Based Tool for Generating and Verifying Hardware-Ready Embedded Memory Models

9th International Symposium on Quality Electronic Design (isqed 2008) ◽

10.1109/isqed.2008.4479776 ◽

2008 ◽

Author(s):

Paul Pao-Fang Cheng

Keyword(s):

Memory Models ◽

Embedded Memory ◽

Knowledge Based

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Minimizing Offset for Latching Voltage-Mode Sense Amplifiers for Sub-Threshold Operation

9th International Symposium on Quality Electronic Design (isqed 2008) ◽

10.1109/isqed.2008.4479712 ◽

2008 ◽

Cited By ~ 14

Author(s):

Joseph F. Ryan ◽

Benton H. Calhoun

Keyword(s):

Voltage Mode ◽

Sense Amplifiers

Download Full-text

9th International Symposium on Quality Electronic Design (isqed 2008)Latest Publications

TOTAL DOCUMENTS

H-INDEX

Published By IEEE

A Statistical Characterization of CMOS Process Fluctuations in Subthreshold Current Mirrors

Thermal Aware Global Routing of VLSI Chips for Enhanced Reliability

Tutorial 1: The Promise of High-k/Metal Gates-From Electronic Transport Phenomena to Emerging Device/Circuit Applications

Accelerating Clock Mesh Simulation Using Matrix-Level Macromodels and Dynamic Time Step Rounding

A Built-in Test and Characterization Method for Circuit Marginality Related Failures

Tutorial 5: Caches in the Many-Core Era: What Purpose Might eDRAM Serve?

Interconnect Signaling and Layout Optimization to Manage Thermal Effects Due to Self Heating in On-Chip Signal Buses

Embedded Deterministic Test Exploiting Care Bit Clustering and Seed Borrowing

A Knowledge-Based Tool for Generating and Verifying Hardware-Ready Embedded Memory Models

Minimizing Offset for Latching Voltage-Mode Sense Amplifiers for Sub-Threshold Operation

9th International Symposium on Quality Electronic Design (isqed 2008)
Latest Publications