ISLPED'06 Proceedings of the 2006 International Symposium on Low Power Electronics and Design
Latest Publications

TOTAL DOCUMENTS

164

(FIVE YEARS 0)

H-INDEX

(FIVE YEARS 0)

Published By IEEE

1595934626

Latest Documents Most Cited Documents Contributed Authors Related Sources Related Keywords

Low Power Design from Technology Challenge to Great Products

ISLPED'06 Proceedings of the 2006 International Symposium on Low Power Electronics and Design ◽

10.1109/lpe.2006.4271838 ◽

2006 ◽

Cited By ~ 1

Author(s):

Barry Dennington

Keyword(s):

Low Power ◽

Low Power Design

Download Full-text

A Two-Port SRAM for Real-Time Video Processor Saving 53% of Bitline Power with Majority Logic and Data-Bit Reordering

ISLPED'06 Proceedings of the 2006 International Symposium on Low Power Electronics and Design ◽

10.1109/lpe.2006.4271808 ◽

2006 ◽

Cited By ~ 4

Author(s):

Hidehiro Fujiwara ◽

Koji Nii ◽

Junichi Miyakoshi ◽

Yuichiro Murachi ◽

Yasuhiro Morita ◽

...

Keyword(s):

Real Time ◽

Majority Logic ◽

Video Processor

Download Full-text

Modelling Macromodules for High-Level Dynamic Power Estimation of FPGA-based Digital Designs

ISLPED'06 Proceedings of the 2006 International Symposium on Low Power Electronics and Design ◽

10.1109/lpe.2006.4271826 ◽

2006 ◽

Cited By ~ 7

Author(s):

Axel Reimer ◽

Arne Schulz ◽

Wolfgang Nebel

Keyword(s):

Power Estimation ◽

Dynamic Power ◽

High Level

Download Full-text

Power-Efficient Pulse Width Modulation DC/DC Converters with Zero Voltage Switching Control

ISLPED'06 Proceedings of the 2006 International Symposium on Low Power Electronics and Design ◽

10.1109/lpe.2006.4271858 ◽

2006 ◽

Author(s):

Changbo Long ◽

Sasank Reddy ◽

Sudhakar Pamarti ◽

Lei He ◽

Tanay Karnik

Keyword(s):

Pulse Width ◽

Pulse Width Modulation ◽

Switching Control ◽

Power Efficient ◽

Zero Voltage Switching ◽

Zero Voltage ◽

Voltage Switching

Download Full-text

Dynamic Thermal Clock Skew Compensation using Tunable Delay Buffers

ISLPED'06 Proceedings of the 2006 International Symposium on Low Power Electronics and Design ◽

10.1109/lpe.2006.4271829 ◽

2006 ◽

Cited By ~ 8

Author(s):

A. Chakraborty ◽

K. Duraisami ◽

A. Sathanur ◽

P. Sithambaram ◽

L. Benini ◽

...

Keyword(s):

Clock Skew

Download Full-text

Thread-Associative Memory for Multicore and Multithreaded Computing

ISLPED'06 Proceedings of the 2006 International Symposium on Low Power Electronics and Design ◽

10.1109/lpe.2006.4271823 ◽

2006 ◽

Cited By ~ 7

Author(s):

Shuo Wang ◽

Lei Wang

Keyword(s):

Associative Memory

Download Full-text

Hierarchical Value Cache Encoding for Off-Chip Data Bus

ISLPED'06 Proceedings of the 2006 International Symposium on Low Power Electronics and Design ◽

10.1109/lpe.2006.4271824 ◽

2006 ◽

Cited By ~ 2

Author(s):

Chung-Hsiang Lin ◽

Chia-Lin Yang ◽

Ku-Jei King

Keyword(s):

Chip Data ◽

Data Bus

Download Full-text

Power Phase Variation in a Commercial Server Workload

ISLPED'06 Proceedings of the 2006 International Symposium on Low Power Electronics and Design ◽

10.1109/lpe.2006.4271864 ◽

2006 ◽

Cited By ~ 1

Author(s):

W. L. Bircher ◽

L. K. John

Keyword(s):

Phase Variation

Download Full-text

Thermal Via Allocation for 3D ICs Considering Temporally and Spatially Variant Thermal Power

ISLPED'06 Proceedings of the 2006 International Symposium on Low Power Electronics and Design ◽

10.1109/lpe.2006.4271828 ◽

2006 ◽

Cited By ~ 9

Author(s):

Hao Yu ◽

Yiyu Shi ◽

Lei He ◽

Tanay Karnik

Keyword(s):

Thermal Power ◽

3D Ics ◽

Spatially Variant

Download Full-text

Sub-Threshold Design: The Challenges of Minimizing Circuit Energy

ISLPED'06 Proceedings of the 2006 International Symposium on Low Power Electronics and Design ◽

10.1109/lpe.2006.4271869 ◽

2006 ◽

Cited By ~ 9

Author(s):

B. H. Calhoun ◽

A. Wang ◽

N. Verma ◽

A. Chandrakasan

Download Full-text

ISLPED'06 Proceedings of the 2006 International Symposium on Low Power Electronics and DesignLatest Publications

TOTAL DOCUMENTS

H-INDEX

Published By IEEE

Low Power Design from Technology Challenge to Great Products

A Two-Port SRAM for Real-Time Video Processor Saving 53% of Bitline Power with Majority Logic and Data-Bit Reordering

Modelling Macromodules for High-Level Dynamic Power Estimation of FPGA-based Digital Designs

Power-Efficient Pulse Width Modulation DC/DC Converters with Zero Voltage Switching Control

Dynamic Thermal Clock Skew Compensation using Tunable Delay Buffers

Thread-Associative Memory for Multicore and Multithreaded Computing

Hierarchical Value Cache Encoding for Off-Chip Data Bus

Power Phase Variation in a Commercial Server Workload

Thermal Via Allocation for 3D ICs Considering Temporally and Spatially Variant Thermal Power

Sub-Threshold Design: The Challenges of Minimizing Circuit Energy

ISLPED'06 Proceedings of the 2006 International Symposium on Low Power Electronics and Design
Latest Publications