2011 6th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS)
Latest Publications

TOTAL DOCUMENTS

(FIVE YEARS 0)

H-INDEX

(FIVE YEARS 0)

Published By IEEE

9781612848990

Latest Documents Most Cited Documents Contributed Authors Related Sources Related Keywords

Adaptive numerical integration methods for deterministic analysis of non-stationary noise in dynamic integrated circuits

2011 6th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS) ◽

10.1109/dtis.2011.5941412 ◽

2011 ◽

Author(s):

Amir Zjajo ◽

Qin Tang ◽

Michel Berkelaar ◽

Nick van der Meijs

Keyword(s):

Integrated Circuits ◽

Numerical Integration ◽

Deterministic Analysis ◽

Integration Methods ◽

Stationary Noise ◽

Numerical Integration Methods

Cryptographic algorithms-on-a-chip: Architectures, designs & implementation platforms

2011 6th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS) ◽

10.1109/dtis.2011.5941405 ◽

2011 ◽

Cited By ~ 5

Author(s):

Nicolas Sklavos

Keyword(s):

Cryptographic Algorithms

Formal generation of synthesizable RTL from regular programs

2011 6th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS) ◽

10.1109/dtis.2011.5941415 ◽

2011 ◽

Author(s):

Michael F. Dossis

Poly-Silicon gate pre-doping implantation impact on MOSFET matching performances

2011 6th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS) ◽

10.1109/dtis.2011.5941437 ◽

2011 ◽

Author(s):

Y. Joly ◽

J. Delalleau ◽

L. Lopez ◽

J.-M. Portal ◽

H. Aziza ◽

...

Keyword(s):

Poly Silicon

Using design of experiment to diagnose analog blocks geometrical defects: Application to current reference circuits

2011 6th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS) ◽

10.1109/dtis.2011.5941448 ◽

2011 ◽

Author(s):

H. Aziza ◽

J-M. Portal ◽

K. Castellani-Coulie

Keyword(s):

Design Of Experiment ◽

Current Reference ◽

Analog Blocks ◽

Geometrical Defects

A novel parallel architecture for low voltage-low power DLL-based frequency multiplier

2011 6th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS) ◽

10.1109/dtis.2011.5941408 ◽

2011 ◽

Cited By ~ 1

Author(s):

Mohammad Gholami ◽

Mohammad Sharifkhani ◽

Mohsen Hashemi

Keyword(s):

Low Power ◽

Low Voltage ◽

Parallel Architecture ◽

Frequency Multiplier

Review of fault injection mechanisms and consequences on countermeasures design

2011 6th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS) ◽

10.1109/dtis.2011.5941421 ◽

2011 ◽

Cited By ~ 7

Author(s):

Jean-Max Dutertre ◽

Jacques J.A. Fournier ◽

Amir-Pasha Mirbaha ◽

David Naccache ◽

Jean-Baptiste Rigaud ◽

...

Keyword(s):

Fault Injection

Automated model conversion for analogue simulation based on SPICE-level description

2011 6th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS) ◽

10.1109/dtis.2011.5941442 ◽

2011 ◽

Author(s):

Likun Xia ◽

Ian M. Bell ◽

Antony J. Wilkinson

Keyword(s):

Analogue Simulation ◽

Simulation Based ◽

Model Conversion

Yield improvement and test cost reduction for TSV based 3D stacked ICs

2011 6th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS) ◽

10.1109/dtis.2011.5941404 ◽

2011 ◽

Author(s):

Said Hamdioui

Keyword(s):

Cost Reduction ◽

Yield Improvement ◽

Test Cost ◽

Test Cost Reduction

CVD assisted fabrication of graphene layers for field effect device fabrication

2011 6th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS) ◽

10.1109/dtis.2011.5941438 ◽

2011 ◽

Cited By ~ 3

Author(s):

Pia Juliane Ginsel ◽

Frank Wessely ◽

Emrah Birinci ◽

Udo Schwalke

Keyword(s):

Field Effect ◽

Device Fabrication ◽

Graphene Layers

2011 6th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS)Latest Publications

TOTAL DOCUMENTS

H-INDEX

Published By IEEE

Adaptive numerical integration methods for deterministic analysis of non-stationary noise in dynamic integrated circuits

Cryptographic algorithms-on-a-chip: Architectures, designs & implementation platforms

Formal generation of synthesizable RTL from regular programs

Poly-Silicon gate pre-doping implantation impact on MOSFET matching performances

Using design of experiment to diagnose analog blocks geometrical defects: Application to current reference circuits

A novel parallel architecture for low voltage-low power DLL-based frequency multiplier

Review of fault injection mechanisms and consequences on countermeasures design

Automated model conversion for analogue simulation based on SPICE-level description

Yield improvement and test cost reduction for TSV based 3D stacked ICs

CVD assisted fabrication of graphene layers for field effect device fabrication

2011 6th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS)
Latest Publications