Proceedings of the IEEE 2004 International Interconnect Technology Conference (IEEE Cat. No.04TH8729)
Latest Publications

TOTAL DOCUMENTS

122

(FIVE YEARS 0)

H-INDEX

(FIVE YEARS 0)

Published By IEEE

0780383087

Latest Documents Most Cited Documents Contributed Authors Related Sources Related Keywords

Integration and performances of an alternative approach using copper silicide as a self-aligned barrier for 45 nm technology node Cu interconnects

Proceedings of the IEEE 2004 International Interconnect Technology Conference (IEEE Cat. No.04TH8729) ◽

10.1109/iitc.2004.1345667 ◽

2004 ◽

Cited By ~ 4

Author(s):

L.G. Gosset ◽

S. Chhun ◽

A. Farcy ◽

N. Casanova ◽

V. Arnal ◽

...

Keyword(s):

Copper Silicide ◽

Technology Node ◽

Cu Interconnects ◽

Alternative Approach

300mm copper low-k integration and reliability for 90 and 65 nm nodes

Proceedings of the IEEE 2004 International Interconnect Technology Conference (IEEE Cat. No.04TH8729) ◽

10.1109/iitc.2004.1345684 ◽

2004 ◽

Cited By ~ 1

Author(s):

S. Parikh ◽

M. Naik ◽

R. Hung ◽

Huixiong Dai ◽

D. Padhi ◽

...

Keyword(s):

Low K

Process optimisation and dual damascene integration of porous CVD SiOC dielectric at 2.4 and 2.2 k-values for 45 nm CMOS technology

Proceedings of the IEEE 2004 International Interconnect Technology Conference (IEEE Cat. No.04TH8729) ◽

10.1109/iitc.2004.1345746 ◽

2004 ◽

Author(s):

V. Arnal ◽

R.J.O.M. Hoofman ◽

M. Assous ◽

P.H.L. Bancken ◽

M. Brokaart ◽

...

Keyword(s):

Cmos Technology ◽

Process Optimisation ◽

Dual Damascene

Effect of pore sealing on the reliability of ULK/Cu interconnects

Proceedings of the IEEE 2004 International Interconnect Technology Conference (IEEE Cat. No.04TH8729) ◽

10.1109/iitc.2004.1345722 ◽

2004 ◽

Author(s):

C. Guedj ◽

L. Arnaud ◽

M. Fayolle ◽

V. Jousseaume ◽

J.F. Guillaumond ◽

...

Keyword(s):

Cu Interconnects ◽

Pore Sealing

TDDB degradation analysis using Ea of leakage current for reliable porous CVD SiOC(k=2.45)/Cu interconnects

Proceedings of the IEEE 2004 International Interconnect Technology Conference (IEEE Cat. No.04TH8729) ◽

10.1109/iitc.2004.1345674 ◽

2004 ◽

Author(s):

T. Yoshie ◽

K. Yoneda ◽

N. Ohashi ◽

N. Kobayashi

Keyword(s):

Leakage Current ◽

Cu Interconnects ◽

Degradation Analysis

Effects of dielectric liners on TDDB lifetime of a Cu/ low-k interconnect

Proceedings of the IEEE 2004 International Interconnect Technology Conference (IEEE Cat. No.04TH8729) ◽

10.1109/iitc.2004.1345692 ◽

2004 ◽

Cited By ~ 1

Author(s):

T.Y. Tsui ◽

P. Matz ◽

R. Willecke ◽

E. Zielinski ◽

Tae Kim ◽

...

Keyword(s):

Low K

Accelerated crack growth of nanoporous low-k glasses in CMP slurry environments

Proceedings of the IEEE 2004 International Interconnect Technology Conference (IEEE Cat. No.04TH8729) ◽

10.1109/iitc.2004.1345760 ◽

2004 ◽

Cited By ~ 2

Author(s):

E.P. Guyer ◽

R.H. Dauskardt

Keyword(s):

Crack Growth ◽

Low K

A technique for incorporation of a heatsink for a system utilizing integrated circuits with wireless connections to an off-chip antenna

Proceedings of the IEEE 2004 International Interconnect Technology Conference (IEEE Cat. No.04TH8729) ◽

10.1109/iitc.2004.1345726 ◽

2004 ◽

Cited By ~ 1

Author(s):

Ran Li ◽

Xiaoling Guo ◽

Kenneth O

Keyword(s):

Integrated Circuits

Highly manufacturable Cu/low-k dual damascene process integration for 65nm technology node

Proceedings of the IEEE 2004 International Interconnect Technology Conference (IEEE Cat. No.04TH8729) ◽

10.1109/iitc.2004.1345683 ◽

2004 ◽

Author(s):

K.-W. Lee ◽

H.J. Shin ◽

J.W. Hwang ◽

S.W. Nam ◽

Y.J. Moon ◽

...

Keyword(s):

Process Integration ◽

Technology Node ◽

Dual Damascene ◽

Damascene Process ◽

Low K

Challenges of clean/strip processing for Cu/low-k technology

Proceedings of the IEEE 2004 International Interconnect Technology Conference (IEEE Cat. No.04TH8729) ◽

10.1109/iitc.2004.1345739 ◽

2004 ◽

Cited By ~ 3

Author(s):

M.R. Baklanov ◽

Q.T. Le ◽

E. Kesters ◽

F. Iacopi ◽

J. Van Aelst ◽

...

Keyword(s):

Low K

Proceedings of the IEEE 2004 International Interconnect Technology Conference (IEEE Cat. No.04TH8729)Latest Publications

TOTAL DOCUMENTS

H-INDEX

Published By IEEE

Integration and performances of an alternative approach using copper silicide as a self-aligned barrier for 45 nm technology node Cu interconnects

300mm copper low-k integration and reliability for 90 and 65 nm nodes

Process optimisation and dual damascene integration of porous CVD SiOC dielectric at 2.4 and 2.2 k-values for 45 nm CMOS technology

Effect of pore sealing on the reliability of ULK/Cu interconnects

TDDB degradation analysis using Ea of leakage current for reliable porous CVD SiOC(k=2.45)/Cu interconnects

Effects of dielectric liners on TDDB lifetime of a Cu/ low-k interconnect

Accelerated crack growth of nanoporous low-k glasses in CMP slurry environments

A technique for incorporation of a heatsink for a system utilizing integrated circuits with wireless connections to an off-chip antenna

Highly manufacturable Cu/low-k dual damascene process integration for 65nm technology node

Challenges of clean/strip processing for Cu/low-k technology

Proceedings of the IEEE 2004 International Interconnect Technology Conference (IEEE Cat. No.04TH8729)
Latest Publications