cmos processes
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Lab on a Chip ◽  
2021 ◽  
Author(s):  
John Cognetti ◽  
Daniel Steiner ◽  
Minhaz Abedin ◽  
Michael Bryan ◽  
Conor Shanahan ◽  
...  

Decades of research have shown that biosensors using photonic circuits fabricated using CMOS processes can be highly sensitive, selective, and quantitative. Unfortunately, the cost of these sensors combined with the...



Author(s):  
Kirill Liubavin ◽  
Alexander Losevskoy ◽  
Igor Ermakov

The results of the development of a digital part for the low-frequency RFID tag and the results of power saving methods study in 180 nm, 90 nm and 45 nm CMOS processes are presented. Using of the presented methods allows to reduce the power consumption and area of the digital part by 400 % and by 50 %, respectively. For the target 180 nm CMOS process the maximum dynamic power is less than 1 μW, and the occupied area is 0.042 mm2.



2020 ◽  
Vol 96 (3s) ◽  
pp. 175-181
Author(s):  
И.В. Ермаков ◽  
А.Ю. Лосевской ◽  
А.В. Нуйкин

Приведены результаты разработки и исследований микросхем/блоков встроенного однократно программируемого ПЗУ типа antiFuse в двух КМОП-техпроцессах уровня 0,18 мкм. Представлен программно-аппаратный комплекс для исследований микросхем ПЗУ. Общий информационный объем исследуемых микросхем ПЗУ составляет порядка 1 Мбит для каждого техпроцесса. The paper presents the research and development of embedded one time programmable ROM (OTP antiFuse) chips/blocks in two 0.18 um CMOS processes. OTP chips measurement setup has been presented, the investigated OTP chips total storage capacity being about 1 Mbit for each process.



Author(s):  
Cheng-Chun Chang ◽  
Ping-Hsiu Hong ◽  
Sheng-Kai Yeh ◽  
Yung-Chian Lin ◽  
Mei-Feng Lai ◽  
...  


2019 ◽  
Vol 3 (2) ◽  
pp. 319-331 ◽  
Author(s):  
Marco Hopstaken ◽  
Marc Juhel ◽  
Jean-Pierre Gonchond ◽  
Laurens Kwakman ◽  
Christophe Wyon




2018 ◽  
Vol 8 (1) ◽  
Author(s):  
George Dabos ◽  
Athanasios Manolis ◽  
Dimitris Tsiokos ◽  
Dimitra Ketzaki ◽  
Evangelia Chatzianagnostou ◽  
...  


2018 ◽  
Vol 7 (3.6) ◽  
pp. 334
Author(s):  
S Shiyamala ◽  
T Kavitha

In the Era of digital World, low power applications are the needs of the market to save the resources. Delay elements (e.g. digital clock) are essential parts of such digital applications. Ring oscillators have been used because of their ease of implementation, wide tuning ranges, operating at low voltages and existing possibility of complete integration in standard CMOS processes. It desires at identifying the best possible configuration for the hoop oscillators having the least strength intake and precise delay with lesser sensitivity to the variations inside the temperature and deliver voltage for frequencies of few KHz. while N = 7, for  0.18 µm generation , put off is 0.07ns simplest. Compare with N = 3, 14.2 % delay time reduced and 12.6 % lower when N= 7 taken into account. 



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