Proceedings of the IEEE 2004 Custom Integrated Circuits Conference (IEEE Cat. No.04CH37571)

Automated extraction of broadly applicable nonlinear analog macromodels from SPICE-level descriptions

Proceedings of the IEEE 2004 Custom Integrated Circuits Conference (IEEE Cat. No.04CH37571) ◽

10.1109/cicc.2004.1358751 ◽

2005 ◽

Cited By ~ 17

Author(s):

N. Dong ◽

J. Roychowdhury

Keyword(s):

Automated Extraction ◽

Nonlinear Analog

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On the selection of on-chip inductors for the optimal VCO design

Proceedings of the IEEE 2004 Custom Integrated Circuits Conference (IEEE Cat. No.04CH37571) ◽

10.1109/cicc.2004.1358797 ◽

2004 ◽

Cited By ~ 1

Author(s):

Yong Zhan ◽

R. Harjani ◽

S.S. Sapatnekar

Keyword(s):

On Chip ◽

Selection Of

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A 90 nm FPGA I/O buffer design with 1.6 Gbps data rate for source-synchronous system and 300 MHz clock rate for external memory interface

Proceedings of the IEEE 2004 Custom Integrated Circuits Conference (IEEE Cat. No.04CH37571) ◽

10.1109/cicc.2004.1358843 ◽

2004 ◽

Cited By ~ 1

Author(s):

J. Tyhach ◽

B. Wang ◽

Chiakang Sung ◽

J. Huang ◽

K. Nguyen ◽

...

Keyword(s):

Data Rate ◽

External Memory ◽

Clock Rate ◽

Synchronous System ◽

Buffer Design ◽

Memory Interface

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5-GHz in-phase coupled oscillators with 39% tuning range

Proceedings of the IEEE 2004 Custom Integrated Circuits Conference (IEEE Cat. No.04CH37571) ◽

10.1109/cicc.2004.1358795 ◽

2004 ◽

Cited By ~ 6

Author(s):

L. Romano ◽

V. Minerva ◽

S.C. d'Oro ◽

C. Samori ◽

M. Politi

Keyword(s):

Coupled Oscillators ◽

Tuning Range ◽

5 Ghz

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A CMOS gyrator low-IF filter for a dual-mode Bluetooth/ZigBee transceiver [mobile phone applications]

Proceedings of the IEEE 2004 Custom Integrated Circuits Conference (IEEE Cat. No.04CH37571) ◽

10.1109/cicc.2004.1358732 ◽

2004 ◽

Cited By ~ 1

Author(s):

B. Guthrie ◽

T. Sayers ◽

A. Spencer ◽

J. Hughes

Keyword(s):

Mobile Phone ◽

Dual Mode ◽

Mobile Phone Applications

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BIST controlled variable sense amp timing for 90nm embedded SRAM

Proceedings of the IEEE 2004 Custom Integrated Circuits Conference (IEEE Cat. No.04CH37571) ◽

10.1109/cicc.2004.1358817 ◽

2004 ◽

Cited By ~ 2

Author(s):

C.J. Brennan ◽

S. Eustis ◽

J. Goss ◽

A. Humphrey ◽

M. Ouellette ◽

...

Keyword(s):

Embedded Sram

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Differential transmission line interconnect for high speed and low power global wiring

Proceedings of the IEEE 2004 Custom Integrated Circuits Conference (IEEE Cat. No.04CH37571) ◽

10.1109/cicc.2004.1358811 ◽

2004 ◽

Cited By ~ 15

Author(s):

S. Gomi ◽

K. Nakamura ◽

H. Ito ◽

K. Okada ◽

K. Masu

Keyword(s):

Low Power ◽

Transmission Line ◽

High Speed ◽

Differential Transmission

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Analytical modeling of MOSFET noise parameters for analog and RF applications

Proceedings of the IEEE 2004 Custom Integrated Circuits Conference (IEEE Cat. No.04CH37571) ◽

10.1109/cicc.2004.1358827 ◽

2004 ◽

Cited By ~ 1

Author(s):

S. Asgaran ◽

M.J. Deen ◽

Chih-Hung Chen

Keyword(s):

Analytical Modeling ◽

Noise Parameters ◽

Rf Applications

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Low power logic circuit and SRAM cell applications with silicon on depletion layer CMOS (SODEL CMOS) technology

Proceedings of the IEEE 2004 Custom Integrated Circuits Conference (IEEE Cat. No.04CH37571) ◽

10.1109/cicc.2004.1358783 ◽

2004 ◽

Cited By ~ 1

Author(s):

S. Inaba ◽

H. Nagano ◽

K. Miyano ◽

I. Mizushima ◽

Y. Okayama ◽

...

Keyword(s):

Low Power ◽

Cmos Technology ◽

Logic Circuit ◽

Depletion Layer ◽

Sram Cell ◽

Low Power Logic

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Measurement and modeling of noise parameters for desensitized low noise amplifiers

Proceedings of the IEEE 2004 Custom Integrated Circuits Conference (IEEE Cat. No.04CH37571) ◽

10.1109/cicc.2004.1358829 ◽

2004 ◽

Cited By ~ 2

Author(s):

G. Banerjee ◽

D.T. Becher ◽

C. Hung ◽

D.J. Allstot ◽

K. Soumyanath

Keyword(s):

Low Noise ◽

Low Noise Amplifiers ◽

Noise Parameters

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Proceedings of the IEEE 2004 Custom Integrated Circuits Conference (IEEE Cat. No.04CH37571)
Latest Publications

TOTAL DOCUMENTS

H-INDEX

Published By IEEE

Automated extraction of broadly applicable nonlinear analog macromodels from SPICE-level descriptions

On the selection of on-chip inductors for the optimal VCO design

A 90 nm FPGA I/O buffer design with 1.6 Gbps data rate for source-synchronous system and 300 MHz clock rate for external memory interface

5-GHz in-phase coupled oscillators with 39% tuning range

A CMOS gyrator low-IF filter for a dual-mode Bluetooth/ZigBee transceiver [mobile phone applications]

BIST controlled variable sense amp timing for 90nm embedded SRAM

Differential transmission line interconnect for high speed and low power global wiring

Analytical modeling of MOSFET noise parameters for analog and RF applications

Low power logic circuit and SRAM cell applications with silicon on depletion layer CMOS (SODEL CMOS) technology

Measurement and modeling of noise parameters for desensitized low noise amplifiers

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Proceedings of the IEEE 2004 Custom Integrated Circuits Conference (IEEE Cat. No.04CH37571)Latest Publications

TOTAL DOCUMENTS

H-INDEX

Published By IEEE

Automated extraction of broadly applicable nonlinear analog macromodels from SPICE-level descriptions

On the selection of on-chip inductors for the optimal VCO design

A 90 nm FPGA I/O buffer design with 1.6 Gbps data rate for source-synchronous system and 300 MHz clock rate for external memory interface

5-GHz in-phase coupled oscillators with 39% tuning range

A CMOS gyrator low-IF filter for a dual-mode Bluetooth/ZigBee transceiver [mobile phone applications]

BIST controlled variable sense amp timing for 90nm embedded SRAM

Differential transmission line interconnect for high speed and low power global wiring

Analytical modeling of MOSFET noise parameters for analog and RF applications

Low power logic circuit and SRAM cell applications with silicon on depletion layer CMOS (SODEL CMOS) technology

Measurement and modeling of noise parameters for desensitized low noise amplifiers

Proceedings of the IEEE 2004 Custom Integrated Circuits Conference (IEEE Cat. No.04CH37571)
Latest Publications