Automatic VHDL Restructuring for RTL Synthesis Optimization and Testability Improvement

2001 ◽  
pp. 227-238
Author(s):  
Dario Corvino ◽  
Italo Epicoco ◽  
Fabrizio Ferrandi ◽  
Franco Fummi ◽  
Donatella Sciuto
Keyword(s):  
Rtl Synthesis

scholarly journals Design and Implementation of Radar Cross-Section Models on a Virtex-6 FPGA

2014 ◽  
Vol 2014 ◽  
pp. 1-10 ◽  
Author(s):  
B. U. V. Prashanth
Keyword(s):  
Cross Section ◽  
Radar Cross Section ◽  
Radar System ◽  
Simulation Environment ◽  
Complex Objects ◽  
Aspect Angle ◽  
Scattered Power ◽  
Timing Diagrams ◽  
Time Simulation ◽  
Rtl Synthesis

The simulation of radar cross-section (RCS) models in FPGA is illustrated. The models adopted are the Swerling ones. Radar cross-section (RCS) which is also termed as echo area gives the amount of scattered power from a target towards the radar. This paper elucidates the simulation of RCS to represent the specified targets under different conditions, namely, aspect angle and frequency. This model is used for the performance evaluation of radar. RCS models have been developed for various targets like simple objects to complex objects like aircrafts, missiles, tanks, and so forth. First, the model was developed in MATLAB real time simulation environment and after successful verification, the same was implemented in FPGA. Xilinx ISE software was used for VHDL coding. This simulation model was used for the testing of a radar system. The results were compared with MATLAB simulations and FPGA based timing diagrams and RTL synthesis. The paper illustrates the simulation of various target radar cross-section (RCS) models. These models are simulated in MATLAB and in FPGA, with the aim of implementing them efficiently on a radar system. This method can be generalized to apply to objects of arbitrary geometry for the two configurations of transmitter and receiver in the same as well as different locations.

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