SPI Bus

2014 ◽  
pp. 177-189
Author(s):  
Warren W. Gay
Keyword(s):  
2013 ◽  
Vol 26 (4) ◽  
pp. 312-319
Author(s):  
Zhui Lin ◽  
Lide Wang ◽  
Jieqiong Zhou ◽  
Liyuan Liu
Keyword(s):  
Spi Bus ◽  

2021 ◽  
Vol 1971 (1) ◽  
pp. 012032
Author(s):  
Dawei Wang ◽  
Jiang Yan ◽  
Ying Qiao
Keyword(s):  
Ip Core ◽  

2014 ◽  
Vol 521 ◽  
pp. 435-439
Author(s):  
Cheng Hao Han ◽  
Xiang Tong Wang ◽  
Hao Li ◽  
Ying Qin ◽  
Dong Yu Liu ◽  
...  

To solve the problems of bulky, high cost and difficult maintenance existing in the electric parameters monitoring system currently, a new electric energy monitoring system is designed. In the system, MAXQ3180 chip can collect the voltage, current, power factor, harmonic and other parameters of the load. Then the relevant data can be collected and sent to AT89S52 microcontroller through SPI bus to saving and manipulating. Meanwhile, to achieve the goal of decentralized control and centralized management, the system can exchange the relevant data with upper computer by CAN bus communication mode. Then the accurate measurement and intelligent management of the electric parameter can be achieved.


2014 ◽  
pp. 187-201
Author(s):  
Warren W. Gay
Keyword(s):  

2011 ◽  
Vol 291-294 ◽  
pp. 2658-2661 ◽  
Author(s):  
Xiao Chun Tian ◽  
Jie Li ◽  
Yu Bao Fan ◽  
Xi Ning Yu ◽  
Jun Liu

SPI (Serial Peripheral Interface) is a full-duplex serial communication interface bus. Now, many devices adopt SPI. However, in many other aspects, microcontroller and microprocessor have no SPI interface, data transmission is inconvenient. With the development of FPGA technology, the problem can be solved absolutely by the I/O port of FPGA. In this paper, after introducing the principle of SPI, we designed SPI interface with FPGA and implemented the communication between SPI interface and the device of CRG20 which has a SPI interface. The algorithm of design SPI interface through FPGA is implemented with VHDL. The results of simulation in Quartus II and FPGA simulation are also described. The SPI bus interface modules fulfill the goal demanded.


2020 ◽  
Vol 1449 ◽  
pp. 012027
Author(s):  
Jiayi Qiang ◽  
Yong Gu ◽  
Guochu Chen

2012 ◽  
Vol 532-533 ◽  
pp. 187-191
Author(s):  
Bei Yang ◽  
Xiao Wu Ding

the system structure of a multi-channel data acquirement system is introduced in this paper. The communication interaction circuit between the main control system and signal conditioning circuit is described. The SPI bus communication type is adopted between C8051F320 and FPGA. The speed and accuracy of datum transfer must be considered in the communication design, so the CRC calibration is used.


Author(s):  
Tianzhi Lv ◽  
Changbo Xiang ◽  
Xiaojun Li ◽  
Feng Wang

2018 ◽  
pp. 283-302
Author(s):  
Warren Gay
Keyword(s):  

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