High-Speed Finite State Machine Design by State Splitting

2018 ◽  
pp. 64-73
Author(s):  
Damian Borecki ◽  
Valery Salauyou ◽  
Tomasz Grzes
Keyword(s):  
High Speed ◽  
Finite State Machine ◽  
State Machine ◽  
Machine Design ◽  
State Splitting ◽  
Finite State

scholarly journals RECONFIGURABLE SELF-ADDRESSABLE MEMORY-BASED FSM A SCALABLE INTRUSION DETECTION ENGINE

2012 ◽  
pp. 144-151
Author(s):  
B. SRILATHA ◽  
KRISHNA KISHORE
Keyword(s):  
High Speed ◽  
Finite State Machine ◽  
State Machine ◽  
Network Attack ◽  
Memory Efficiency ◽  
Attack Pattern ◽  
Current State ◽  
Incoming Packet ◽  
Finite State ◽  
Attack Patterns

One way to detect and thwart a network attack is to compare each incoming packet with predefined patterns, also Called an attack pattern database, and raise an alert upon detecting a match. This article presents a novel pattern-matching Engine that exploits a memory-based, programmable state machine to achieve deterministic processing rates that are Independent of packet and pattern characteristics. Our engine is a self addressable memory based finite state machine (samFsm), whose current state coding exhibits all its possible next states. Moreover, it is fully reconfigurable in that new attack Patterns can be updated easily. A methodology was developed to program the memory and logic. Specifically, we merge “non-equivalent” states by introducing “super characters” on their inputs to further enhance memory efficiency without Adding labels. This is the most high speed self addressable memory based fsm.sam-fsm is one of the most storage-Efficient machines and reduces the memory requirement by 60 times. Experimental results are presented to demonstrate the Validity of sam-fsm.

High-Speed and Area-Efficient Reconfigurable Multiplexer Bank for RAM-Based Finite State Machine Implementations

2015 ◽  
Vol 24 (07) ◽  
pp. 1550101 ◽  
Author(s):  
Raouf Senhadji-Navaro ◽  
Ignacio Garcia-Vargas
Keyword(s):  
High Speed ◽  
Finite State Machine ◽  
State Of The Art ◽  
Behavioral Model ◽  
State Machine ◽  
The State ◽  
Experimental Results ◽  
State Machines ◽  
Finite State ◽  
Area Efficient

This work is focused on the problem of designing efficient reconfigurable multiplexer banks for RAM-based implementations of reconfigurable state machines. We propose a new architecture (called combination-based reconfigurable multiplexer bank, CRMUX) that use multiplexers simpler than that of the state-of-the-art architecture (called variation-based reconfigurable multiplexer bank, VRMUX). The performance (in terms of speed, area and reconfiguration cost) of both architectures is compared. Experimental results from MCNC finite state machine (FSM) benchmarks show that CRMUX is faster and more area-efficient than VRMUX. The reconfiguration cost of both multiplexer banks is studied using a behavioral model of a reconfigurable state machine. The results show that the reconfiguration cost of CRMUX is lower than that of VRMUX in most cases.

Reconfigurable finite-state machine based IP lookup engine for high-speed router

2003 ◽  
Vol 21 (4) ◽  
pp. 501-512 ◽  
Author(s):  
M. Desai ◽  
R. Gupta ◽  
A. Karandikar ◽  
K. Saxena ◽  
V. Samant
Keyword(s):  
High Speed ◽  
Finite State Machine ◽  
State Machine ◽  
Ip Lookup ◽  
Finite State

Design of Finite State Machine Based on VHDL

2012 ◽  
Vol 529 ◽  
pp. 335-338 ◽  
Author(s):  
Zhi Ping Zhu ◽  
Yong Qin Liu ◽  
Hong Sheng ◽  
Feng Ye
Keyword(s):  
Finite State Machine ◽  
Design Method ◽  
State Machine ◽  
Machine Design ◽  
General State ◽  
Encoding Scheme ◽  
Advantages And Disadvantages ◽  
Finite State

Different encoding scheme and method for process description of state machine are analyzed in detail, and the advantages and disadvantages of each are pointed out. The general state machine design method is given by a specific example program, according to the actual need, designers can choose different encoding scheme and method for process description to design.

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