Void fraction of a Sn–Ag–Cu solder joint underneath a chip resistor and its effect on joint strength and thermomechanical reliability

2019 ◽  
Vol 30 (17) ◽  
pp. 15889-15896
Author(s):  
Wonil Seo ◽  
Yong-Ho Ko ◽  
Young-Ho Kim ◽  
Sehoon Yoo
Author(s):  
Bob Wettermann

Abstract As the pitch and package sizes of semiconductor devices have shrunk and their complexity has increased, the manual methods by which the packages can be re-bumped or reballed for failure analysis have not kept up with this miniaturization. There are some changes in the types of reballing preforms used in these manual methods along with solder excavation techniques required for packages with pitches as fine as 0.3mm. This paper will describe the shortcomings of the previous methods, explain the newer methods and materials and demonstrate their robustness through yield, mechanical solder joint strength and x-ray analysis.


2003 ◽  
Vol 2003.6 (0) ◽  
pp. 229-230
Author(s):  
Toshihiro MATSUNAGA ◽  
Yasumi UEGAI ◽  
Kozo HARADA ◽  
Shinji BABA ◽  
Qiang Wu

2000 ◽  
Author(s):  
Chi-Hsiung Chang ◽  
Maw-Tyan Sheen ◽  
Jao-Hwa Kuang ◽  
Chi-Chen Chen ◽  
Gol-Lin Wang ◽  
...  

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