Due to its high theoretical specific capacity, a silicon anode is one of the candidates for realizing high energy density lithium-ion batteries (LIBs). However, problems related to bulk silicon (e.g., low intrinsic conductivity and massive volume expansion) limit the performance of silicon anodes. In this work, to improve the performance of silicon anodes, a vertically aligned n-type silicon nanowire array (n-SiNW) was fabricated using a well-controlled, top-down nano-machining technique by combining photolithography and inductively coupled plasma reactive ion etching (ICP-RIE) at a cryogenic temperature. The array of nanowires ~1 µm in diameter and with the aspect ratio of ~10 was successfully prepared from commercial n-type silicon wafer. The half-cell LIB with free-standing n-SiNW electrode exhibited an initial Coulombic efficiency of 91.1%, which was higher than the battery with a blank n-silicon wafer electrode (i.e., 67.5%). Upon 100 cycles of stability testing at 0.06 mA cm−2, the battery with the n-SiNW electrode retained 85.9% of its 0.50 mAh cm−2 capacity after the pre-lithiation step, whereas its counterpart, the blank n-silicon wafer electrode, only maintained 61.4% of 0.21 mAh cm−2 capacity. Furthermore, 76.7% capacity retention can be obtained at a current density of 0.2 mA cm−2, showing the potential of n-SiNW anodes for high current density applications. This work presents an alternative method for facile, high precision, and high throughput patterning on a wafer-scale to obtain a high aspect ratio n-SiNW, and its application in LIBs.
Fabrication of vertically aligned Pd nanowire array in AAO template by electrodeposition using neutral electrolyte
