scholarly journals A scaling limit for the cover time of the binary tree

2021 ◽  
Vol 391 ◽  
pp. 107974
Author(s):  
Aser Cortines ◽  
Oren Louidor ◽  
Santiago Saglietti
Keyword(s):  
2002 ◽  
Vol 716 ◽  
Author(s):  
Parag C. Waghmare ◽  
Samadhan B. Patil ◽  
Rajiv O. Dusane ◽  
V.Ramgopal Rao

AbstractTo extend the scaling limit of thermal SiO2, in the ultra thin regime when the direct tunneling current becomes significant, members of our group embarked on a program to explore the potential of silicon nitride as an alternative gate dielectric. Silicon nitride can be deposited using several CVD methods and its properties significantly depend on the method of deposition. Although these CVD methods can give good physical properties, the electrical properties of devices made with CVD silicon nitride show very poor performance related to very poor interface, poor stability, presence of large quantity of bulk traps and high gate leakage current. We have employed the rather newly developed Hot Wire Chemical Vapor Deposition (HWCVD) technique to develop the a:SiN:H material. From the results of large number of optimization experiments we propose the atomic hydrogen of the substrate surface prior to deposition to improve the quality of gate dielectric. Our preliminary results of these efforts show a five times improvement in the fixed charges and interface state density.


2013 ◽  
Vol 32 (9) ◽  
pp. 2548-2552
Author(s):  
Wei CAO ◽  
Guang-yao DUAN

Sign in / Sign up

Export Citation Format

Share Document