Improvement in Gate Dielectric Quality of Ultra Thin a: SiN:H MNS Capacitor by Hydrogen Etching of the Substrate

2002 ◽  
Vol 716 ◽  
Author(s):  
Parag C. Waghmare ◽  
Samadhan B. Patil ◽  
Rajiv O. Dusane ◽  
V.Ramgopal Rao
Keyword(s):  
Silicon Nitride ◽  
Gate Dielectric ◽  
Substrate Surface ◽  
Scaling Limit ◽  
Tunneling Current ◽  
Chemical Vapor ◽  
Poor Performance ◽  
State Density ◽  
Direct Tunneling Current

AbstractTo extend the scaling limit of thermal SiO2, in the ultra thin regime when the direct tunneling current becomes significant, members of our group embarked on a program to explore the potential of silicon nitride as an alternative gate dielectric. Silicon nitride can be deposited using several CVD methods and its properties significantly depend on the method of deposition. Although these CVD methods can give good physical properties, the electrical properties of devices made with CVD silicon nitride show very poor performance related to very poor interface, poor stability, presence of large quantity of bulk traps and high gate leakage current. We have employed the rather newly developed Hot Wire Chemical Vapor Deposition (HWCVD) technique to develop the a:SiN:H material. From the results of large number of optimization experiments we propose the atomic hydrogen of the substrate surface prior to deposition to improve the quality of gate dielectric. Our preliminary results of these efforts show a five times improvement in the fixed charges and interface state density.

Alternative Gate Dielectrics with BST/TIO2/(Barrier Oxide) Stacked Structure

1998 ◽  
Vol 525 ◽  
Author(s):  
Yongjoo Jeon ◽  
Byoung Hun Lee ◽  
Keith Zawadzki ◽  
Wen-Jie Qi ◽  
Jack C. Lee
Keyword(s):  
Leakage Current ◽  
Barrier Layer ◽  
Gate Dielectric ◽  
Gate Dielectrics ◽  
Tunneling Current ◽  
Annealing Conditions ◽  
Higher Temperature ◽  
Direct Tunneling Current ◽  
Mis Capacitors

ABSTRACTBST/TiO2/(Barrier Layer) stacked dielectric structure has been proposed for ultra thin (<20Å) gate dielectric application to overcome the direct tunneling current problem of Si02. To characterize the alternative dielectrics, MIM and MIS capacitors were fabricated. TiO2 is believed to prevent BST and Si from reaction and interdiffusion while TiC2 itself is stable due to the strong binding energy. For better interfacial quality of TiO2/Si interface, proper barrier layer is needed between TiO2 and Si. Optimization of this barrier layer was performed by RTP grown N20 oxide and self-grown interfacial oxide layer with various annealing conditions. To monitor these barrier layers, TEM and electrical analysis were performed. From TEM observation, it was found that interfacial layer was formed in every sample whether it was intentionally grown or not. It was observed that the leakage current of Pt/TiO2/Si dramatically increased after 700'C or higher temperature annealing. This might be related to the transition of crystal structure of TiO2 from anatese to rutile at about 700°C[1]. It was also found that both Pt/BST/TiO2/Si and Pt/TiO2/Si showed lower leakage current compare to the conventional NO oxide at comparable equivalent SiO2 thickness. These results imply that these materials hold some promise as alternatives of pure SiO2 in very thin range.

The Study of Direct Tunneling Current in Strained MOS Device with Silicon Nitride Stack Gate Dielectric

2011 ◽  
Vol 110-116 ◽  
pp. 5442-5446
Author(s):  
Li Jun Xu ◽  
He Ming Zhang ◽  
Hui Yong Hu ◽  
Xiao Bo Xu ◽  
Jian Li Ma
Keyword(s):  
Dielectric Constant ◽  
Silicon Nitride ◽  
Gate Dielectric ◽  
Device Simulation ◽  
Tunneling Current ◽  
Simulation Software ◽  
Direct Tunneling ◽  
Direct Tunneling Current ◽  
Application Limit ◽  
Mos Device

As the size of MOS device scaled down to sub 100nm, the direct tunneling current of gate oxide increases more and more. Using silicon nitride as gate dielectric can solve this problem effectively in some time due to the dielectric constant of silicon nitride is larger than silica’s.This paper derived the dielectric constant of silicon nitride stack gate dielectric,and simulated the direct tunneling current of strained MOS device with silica and silicon nitride gate dielectric through device simulation software ISE TCAD10.0,studied the direct tunneling current of strained MOS device with silicon nitride stack gate dielectric change with the variation of some parameters and the application limit of silicon nitride material.

Characterization of homoepitaxial diamond films by Electron microscopy

1991 ◽  
Vol 49 ◽  
pp. 880-881
Author(s):  
D.P. Malta ◽  
S.A. Willard ◽  
R.A. Rudder ◽  
G.C. Hudson ◽  
J.B. Posthill ◽  
...  
Keyword(s):  
Electron Microscopy ◽  
Surface Defects ◽  
Substrate Surface ◽  
Diamond Films ◽  
Chemical Vapor ◽  
Polycrystalline Diamond ◽  
Large Degree ◽  
Rf Plasma ◽  
Semiconducting Diamond

Semiconducting diamond films have the potential for use as a material in which to build active electronic devices capable of operating at high temperatures or in high radiation environments. A major goal of current device-related diamond research is to achieve a high quality epitaxial film on an inexpensive, readily available, non-native substrate. One step in the process of achieving this goal is understanding the nucleation and growth processes of diamond films on diamond substrates. Electron microscopy has already proven invaluable for assessing polycrystalline diamond films grown on nonnative surfaces.The quality of the grown diamond film depends on several factors, one of which is the quality of the diamond substrate. Substrates commercially available today have often been found to have scratched surfaces resulting from the polishing process (Fig. 1a). Electron beam-induced current (EBIC) imaging shows that electrically active sub-surface defects can be present to a large degree (Fig. 1c). Growth of homoepitaxial diamond films by rf plasma-enhanced chemical vapor deposition (PECVD) has been found to planarize the scratched substrate surface (Fig. 1b).

Low-Temperature Formation of SiNx Gate Insulator for Thin-Film Transistor Using CAT-CVD Method

1998 ◽  
Vol 508 ◽  
Author(s):  
A. Izumi ◽  
T. Ichise ◽  
H. Matsumura
Keyword(s):  
Thin Film ◽  
Chemical Vapor Deposition ◽  
Silicon Nitride ◽  
Vapor Deposition ◽  
Thin Film Transistors ◽  
Chemical Vapor ◽  
State Density ◽  
Gate Insulator ◽  
Catalytic Chemical Vapor Deposition ◽  
Silicon Nitride Films

AbstractSilicon nitride films prepared by low temperatures are widely applicable as gate insulator films of thin film transistors of liquid crystal displays. In this work, silicon nitride films are formed around 300 °C by deposition and direct nitridation methods in a catalytic chemical vapor deposition system. The properties of the silicon nitride films are investigated. It is found that, 1) the breakdown electric field is over 9MV/cm, 2) the surface state density is about 1011cm−2eV−1 are observed in the deposition films. These result shows the usefulness of the catalytic chemical vapor deposition silicon nitride films as gate insulator material for thin film transistors.

Silicon Nitride as Top Gate Dielectric for Epitaxial Graphene

2013 ◽  
Vol 740-742 ◽  
pp. 149-152 ◽  
Author(s):  
Peter Wehrfritz ◽  
Felix Fromm ◽  
Stefan Malzer ◽  
Thomas Seyller
Keyword(s):  
Silicon Nitride ◽  
Photoelectron Spectroscopy ◽  
Gate Dielectric ◽  
Chemical Vapor ◽  
Epitaxial Graphene ◽  
Plasma Process ◽  
Voltage Range ◽  
Before And After ◽  
Field Effect Devices ◽  
A Minor

Silicon nitride (SiN) was deposited by plasma enhanced chemical vapor deposition (PECVD) as a top gate dielectric on epitaxial graphene on 6H-SiC(0001). We compare x-ray photoelectron spectroscopy (XPS), Raman spectroscopy, and transport measurements which were performed before and after the SiN deposition. We demonstrate that closed layers of SiN are formed without the need for surface activation and that the plasma process leads only to a minor degradation of the graphene. The SiN layer induces strong n-type doping. For a limited gate voltage range, a small hysteresis of 0.2 V is observed in top-gated field effect devices.

Reduction of p+-n+ Junction Tunneling Current for Base Current Improvement in Si/SiGe/Si Heterojunction Bipolar Transistors

1991 ◽  
Vol 220 ◽  
Author(s):  
Ž Matutinović-Krstelj ◽  
E. J. Prinz ◽  
P. V. Schwartz ◽  
J. C. Sturm
Keyword(s):  
Heterojunction Bipolar Transistors ◽  
Vapor Deposition ◽  
Tunneling Current ◽  
Chemical Vapor ◽  
Bipolar Transistors ◽  
Thermal Chemical Vapor Deposition ◽  
Base Current ◽  
Different Temperatures ◽  
High Reduction

ABSTRACTA reduction of parasitic tunneling current by three orders of magnitude in epitaxial p+-n+ junctions grown by Rapid Thermal Chemical Vapor Deposition (RTCVD) compared to previously published ion implantation results is reported. These results are very important for the reduction of base current in scaled homojunction and Si/SiGe/Si heterojunction bipolar transistors. High reduction in tunneling currents allows higher limits to transistor base and emitter dopings. Significant tunneling was observed when the doping levels at the lighter doped side of the junction were of the order of 1×1019cm−3 for both Si/Si and SiGe/Si devices. These results were confirmed by I-V measurements performed at different temperatures. Since the tunneling current is mediated by midgap states at the junction, these results demonstrate the high quality of the epitaxial interface.

Low-Temperature Chemical-Vapor-Deposition of Silicon-Nitride from Tetra-Silane and Hydrogen Azide

1992 ◽  
Vol 284 ◽  
Author(s):  
Ryoichi Ishihara ◽  
Hiroshi Kanoh ◽  
Yasutaka Uchida ◽  
Osamu Sugiura ◽  
Masakiyo Matsumura
Keyword(s):  
Chemical Vapor Deposition ◽  
Silicon Nitride ◽  
Vapor Deposition ◽  
Gate Dielectric ◽  
Chemical Vapor ◽  
Atomic Ratio ◽  
Breakdown Field ◽  
Silicon Thin Film ◽  
Silicon Nitride Films ◽  
Low Field

ABSTRACTSilicon nitride films have been successfully deposited at a temperature as low as 300°C by chemical-vapor-deposition using tctra-silane (Si4 H10) and hydrogen azidc (HN3). Atomic ratio (N/Si) of the film deposited at 400°C was 1.47, i.e., the film was N-rich. Total hydrogen content was about 25atomic%. The breakdown-field strength was 6.5MV/cm at leakage-current density of 1μA/cm2, and the low-field resistivity was more than 1015 Ωcm. Similar electrical characteristics were obtained from films deposited at a temperature range between 300°C and 500°C. Amorphous silicon thin-film transistors equipped with this film as the gate dielectric showed good transfer characteristics.

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