Workmanship defect classification in medium voltage cable terminations with convolutional neural network

2021 ◽  
Vol 194 ◽  
pp. 107105
Author(s):  
Halil Ibrahim Uckol ◽  
Suat Ilhan ◽  
Aydogan Ozdemir
Metals ◽  
2021 ◽  
Vol 11 (4) ◽  
pp. 639
Author(s):  
Chen Ma ◽  
Haifei Dang ◽  
Jun Du ◽  
Pengfei He ◽  
Minbo Jiang ◽  
...  

This paper proposes a novel metal additive manufacturing process, which is a composition of gas tungsten arc (GTA) and droplet deposition manufacturing (DDM). Due to complex physical metallurgical processes involved, such as droplet impact, spreading, surface pre-melting, etc., defects, including lack of fusion, overflow and discontinuity of deposited layers always occur. To assure the quality of GTA-assisted DDM-ed parts, online monitoring based on visual sensing has been implemented. The current study also focuses on automated defect classification to avoid low efficiency and bias of manual recognition by the way of convolutional neural network-support vector machine (CNN-SVM). The best accuracy of 98.9%, with an execution time of about 12 milliseconds to handle an image, proved our model can be enough to use in real-time feedback control of the process.


Author(s):  
Uzma Batool ◽  
Mohd Ibrahim Shapiai ◽  
Nordinah Ismail ◽  
Hilman Fauzi ◽  
Syahrizal Salleh

Silicon wafer defect data collected from fabrication facilities is intrinsically imbalanced because of the variable frequencies of defect types. Frequently occurring types will have more influence on the classification predictions if a model gets trained on such skewed data. A fair classifier for such imbalanced data requires a mechanism to deal with type imbalance in order to avoid biased results. This study has proposed a convolutional neural network for wafer map defect classification, employing oversampling as an imbalance addressing technique. To have an equal participation of all classes in the classifier’s training, data augmentation has been employed, generating more samples in minor classes. The proposed deep learning method has been evaluated on a real wafer map defect dataset and its classification results on the test set returned a 97.91% accuracy. The results were compared with another deep learning based auto-encoder model demonstrating the proposed method, a potential approach for silicon wafer defect classification that needs to be investigated further for its robustness.


2020 ◽  
Vol 14 (14) ◽  
pp. 2693-2702
Author(s):  
Ashfaq Ahmad ◽  
Yi Jin ◽  
Changan Zhu ◽  
Iqra Javed ◽  
Asim Maqsood ◽  
...  

2017 ◽  
Vol 56 (09) ◽  
pp. 1 ◽  
Author(s):  
Junfeng Jing ◽  
Amei Dong ◽  
Pengfei Li ◽  
Kaibing Zhang

Sensors ◽  
2021 ◽  
Vol 21 (21) ◽  
pp. 7076
Author(s):  
Jun Wang ◽  
Xiaomeng Zhou ◽  
Jingjing Wu

To improve the recognition rate of chip appearance defects, an algorithm based on a convolution neural network is proposed to identify chip appearance defects of various shapes and features. Furthermore, to address the problems of long training time and low accuracy caused by redundant input samples, an automatic data sample cleaning algorithm based on prior knowledge is proposed to reduce training and classification time, as well as improve the recognition rate. First, defect positions are determined by performing image processing and region-of-interest extraction. Subsequently, interference samples between chip defects are analyzed for data cleaning. Finally, a chip appearance defect classification model based on a convolutional neural network is constructed. The experimental results show that the recognition miss detection rate of this algorithm is zero, and the accuracy rate exceeds 99.5%, thereby fulfilling industry requirements.


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