Automated design error debug using high-level decision diagrams and mutation operators

Grasp planning and motion synthesis for dexterous manipulation tasks are traditionally done given a pre-existing kinematic model for the robotic hand. In this paper, we introduce a framework for automatically designing hand topologies best suited for manipulation tasks given high-level objectives as input. Our pipeline is capable of building custom hand designs around specific manipulation tasks based on high-level user input. Our framework comprises of a sequence of trajectory optimizations chained together to translate a sequence of objective poses into an optimized hand mechanism along with a physically feasible motion plan involving both the constructed hand and the object. We demonstrate the feasibility of this approach by synthesizing a series of hand designs optimized to perform specified in-hand manipulation tasks of varying difficulty. We extend our original pipeline 32 to accommodate the construction of hands suitable for multiple distinct manipulation tasks as well as provide an in depth discussion of the effects of each non-trivial optimization term.

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High-Level Decision Diagrams based coverage metrics for verification and test

2009 10th Latin American Test Workshop ◽

10.1109/latw.2009.4813792 ◽

2009 ◽

Cited By ~ 3

Author(s):

Maksim Jenihhin ◽

Jaan Raik ◽

Anton Chepurov ◽

Uljana Reinsalu ◽

Raimund Ubar

Keyword(s):

Decision Diagrams ◽

Coverage Metrics ◽

High Level

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Diagnostic modeling of microprocessors with high-level decision diagrams

2008 11th International Biennial Baltic Electronics Conference ◽

10.1109/bec.2008.4657500 ◽

2008 ◽

Author(s):

R. Ubar ◽

J. Raik ◽

A. Jutman ◽

M. Jenihhin ◽

M. Brik ◽

...

Keyword(s):

Decision Diagrams ◽

High Level ◽

Diagnostic Modeling

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High-Level Decision Diagram Simulation for Diagnosis and Soft-Error Analysis

Design and Test Technology for Dependable Systems-on-Chip - Advances in Computer and Electrical Engineering ◽

10.4018/978-1-60960-212-3.ch013 ◽

2011 ◽

pp. 294-309 ◽

Cited By ~ 2

Author(s):

Jaan Raik ◽

Urmas Repinski ◽

Maksim Jenihhin ◽

Anton Chepurov

Keyword(s):

Fault Injection ◽

Soft Errors ◽

Soft Error ◽

Design Representation ◽

Design Error ◽

Error Location ◽

Hardware Description ◽

Source Level ◽

High Level ◽

Diagnosis Approach

This Chapter addresses the above-mentioned challenges by presenting a holistic diagnosis approach for design error location and malicious fault list generation for soft errors. First, a method for locating design errors at the source-level of hardware description language code using the design representation of high-level decision diagrams is explained. Subsequently, this method is reduced to malicious fault list generation at the high-level. A minimized fault list is generated for optimizing the time to be spent on the fault injection run necessary for assessing designs vulnerability to soft-errors.

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