Thermal interface materials (TIMs) are crucial elements for packaging of power electronics. In particular, development of high-temperature lead-free die-attach TIMs for silicon carbide wide bandgap power electronics is a challenge. Among major options, sintered silver shows advantages in ease of applications. Cost, performance, reliability, and integration are concerns for technology implementation. The current study first discusses issues and status reported in literatures. Then it focuses on cost reduction and performance improvement of sintered silver using enhancement structures at micro- and nano-scales. A few design architectures are analyzed by finite element methods. The feasibility of strengthening edges and corners is also assessed. The downside of potential increase of unfavorable stresses to accelerate void coalescence would be optimized in conjunction with design concept of power electronics package modules for paths of solutions in the form of integrated systems. Demands of developing new high-temperature packaging materials to enable optimized package designs are also highlighted.
Degradation of thermal interface materials for high-temperature power electronics applications
